The A/D synchronization algorithm is described at a kernel level rather than at the behavioral process level. I would prefer a description that is more general and applicable to multi-solver and multi-kernel simulators, e.g.:
Step 1: Processes execute and schedules future
values (and set d?/dt etc.) and a
callback event (at acceptance, if
necessary).
Step 2: Simulator steps to global next event
(analog or digital) and executes it.
Step 3: Processes activated by event execute
and reschedule future values and events.
Step 4: Goto step 2
NB: Time is continous, 'digital time' doesn't
really exist. The diagrams at the end of the link above confuse
the issue by "hopping" around in time. (See "Time Continued")
Disjoint analog blocks in a mixed-signal simulation need not use the same matrix solver, and some analog blocks may not need a solver at all if they are entirely "signal flow".