Subject: Re: Proposal for rewriting Section 8.3.2
From: Kevin Cameron x3251 (dkc@galaxy.nsc.com)
Date: Tue Oct 30 2001 - 09:56:08 PST
> From grouts@flash.net Mon Oct 29 22:29:23 2001
>
> Gentlemen - I have been listening to this discussion
> about X and Z, and am concerned that the focus is largely
> on X and Z from a digital POV, and not about propagating analog
> signal values and port drives into a digital portion of
> the design. Ernst earlier pointed at the VHDL work in
> this area. It strikes me that, in a real circuit, the behavior
> of a port drive changing from some driven analog (non-X and
> non-Z) value to a Z is a fairly specific analog circuit behavior.
> Shouldn't our changes support that?
>
....
I think it is pretty difficult to generate a 'Z' value through
an A->D convertor since you would normally just convert the
node voltage to a logic level without looking at what the
contributions are - e.g. a mainly capacitive node will have
near zero contributions when charged, but a valid logic level.
So mostly the output from analog is 0,1 or X. Attempting to
apply a voltage to a 'digital' wire causes an A->D to be
inserted at elaboration and the digital value of the wire is
then always determined by that A->D.
I don't think there is a problem unless the digital behavioral
code expects to see a Zs.
Kev.
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