Subject: Tasks for next revision
From: Kevin Cameron x3251 (Kevin.Cameron@nsc.com)
Date: Mon Apr 28 2003 - 16:40:48 PDT
[ For SRI ]
Hi all,
I thought i will send an initial list of issues (from Annex G) that i think will be good to start looking at...Please have a look at Annex G, and we can discuss these in the next LRM committee call. I have picked some of the more easier ones to fix and also some of the problems that are analog-only mainly in this list. We can go through this list, and discuss briefly on each of the items and identify people to work on these issues...A few of the items that i have mentioned below require only minor work to make the LRM correct and consistent.
Item # Description
4 IC Analysis is not clearly defined for mixed signal simulations and initialization with the digital engine during
steady state.
5 Syntax of $random to be in sync with digital and analog
6 Issue with genvar. genvar is defined in both Verilog-2001 as well as Verilog-AMS, but are used in different
context.
8 Support for global variables using dynamic parameters
9 Ambiguities with if-else-if BNF syntax when nested statically evaluatable if statements are used.
10 Contribution Stmts - LRM is not very clear and specific whether they should be allowed in events (like
initial_step) and also within loops.
11 DCSweep is not defined as part of initial_step/final_step behaviour and analysis dependent function should be
clearly defined with use of tables to denote how they behave.
12 Syntax inconsistencies between the BNF defined in annexure and one defined in syntax snippets as part of the
sections.
14 Switch branch syntax has no BNF defined and is explained only through an example. Also LRM is ambigous about
usage of indirect branch assignments in a conditional statement.
15 Discipline Compatibility - How should compatible disciplines with different abstols be resolved? Should the
tighter tolerance apply? This needs to be stated clearly in the LRM
17 Meaning of 'analysis point' in the table explaining initial_step and final_step (section 6.7.4) is not clearly
defined.
19 Should the specification of the Zi filter expressed in terms of Z^-1 or Z? The current version of the LRM
expresses them as Z, however the earlier (1.3) versions expressed them as Z^-1.
21 Coercion of string to real does not make sense and is not defined, but is currently allowed. The LRM should not
allow coercion of string to real and treat it as error in analog context.
23 Support of ",," (comma-comma) syntax for NULL arguments instead of "{}". This would be useful for laplace/zi
operators
27 Support for break/continue statements to break out of loops
28 Indexing of named vector branches is not defined clearly in the LRM.
29 Bitwise nand/nor is mentioned in operator precedence but there is no mention of these operators in the list of
bitwise operators.
30 Verilog-AMS BNF does not currently support register declarations in named blocks mentioned in an @(initial)
or @(always) block.
31 LRM should explicitly state that the return values of analog UDFs should be scalar.
32 Can event statements (like cross, timer) be used inside loops (for, while)? The BNF disallows the usage of this
syntax but there are references to this usage in examples.
33 Verilog-AMS LRM support discipline attributes but the grammer doesnt support any way of accessing these
attributes.
The other task that I would like to work on is to make sure the that analog BNF is complete and correct in its own respect
- Appendix A (BNF) is incomplete in some of its grammer.
- The syntax snippets mentioned in the sections do not match the BNF described in Appendix
- The examples mentioned in the BNF sometimes contradict the BNF usage and the descriptions
I think it will be good to clean up initially the analog part of the grammer to make sure its complete in its own regard. Where there is a need to make the grammer consistent with digital (for example expressions) needs a bit further discussion.
Also probably Kevin was mentioning that we should start looking at the back annotation problem, as Verilog-AMS doesnt currently support it. This is already identified in the list of issues as item #2.
I hope we can go through this list in the next LRM call, and assign some action items and start working on the next version.
Next Committee Meeting:
Date: 28th April 2003
Time: 4:30pm US PST.
cheers,
Sri
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