Subject: Re: Infinity in Verilog-AMS
From: Kevin Cameron x3251 (Kevin.Cameron@nsc.com)
Date: Tue Apr 29 2003 - 09:45:55 PDT
> From Geoffrey.Coram@analog.com Tue Apr 29 07:30:24 2003
>
> Hi, Sri -
> I was wondering if you (or Kevin) recall why infinity was
> taken out of OVI-2.0 as an allowed value for parameters.
> It was allowed in OVI-1.0, but is presently only allowed
> in ranges, eg, parameter real BV = 1000 from [0:inf).
>
> It's something I'd like to see back for device modeling,
> so I want to know what the reason was and how much
> resistance we'll face trying to get it back.
>
> Thanks.
> -Geoffrey
>
Don't know, but I'm sure we can add it back in.
Note: due to issues with adding keywords it's preferable
to declare things like 'inf' in standard header files
(like in C). SystemVerilog has a "$root" scope where
you can declare things like numeric constants (rather
than using `define).
Kev.
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