Subject: RE: Infinity in Verilog-AMS
From: Martin O'Leary (oleary@cadence.com)
Date: Tue Apr 29 2003 - 10:11:53 PDT
Geoffrey,
It was removed as inf is not a valid number.
Understand the requirement you have - my take is that adding a system task such as $param_given is a better way to know if a parameter was set or not.
Thanks,
--Martin
> -----Original Message-----
> From: Geoffrey.Coram [mailto:Geoffrey.Coram@analog.com]
> Sent: Tuesday, April 29, 2003 9:51 AM
> To: Kevin Cameron x3251
> Cc: verilog-ams@eda.org
> Subject: Re: Infinity in Verilog-AMS
>
> Kevin -
> Infinity still exists as a keyword in OVI-2.0, because
> you can say
> parameter real BV = 30 from [0:inf);
> You just can't say
> parameter real BV = inf from [0:inf];
>
> So I'm not asking to add a keyword.
>
> -Geoffrey
>
>
> Kevin Cameron x3251 wrote:
> > Don't know, but I'm sure we can add it back in.
> >
> > Note: due to issues with adding keywords it's preferable
> > to declare things like 'inf' in standard header files
> > (like in C). SystemVerilog has a "$root" scope where
> > you can declare things like numeric constants (rather
> > than using `define).
> >
> > Kev.
>
> --
> Geoffrey J. Coram, Ph.D. Senior CAD Engineer
> Analog Devices, Inc. Geoffrey.Coram@analog.com
> 804 Woburn St., MS-422, Tel (781) 937-1924
> Wilmington, MA 01887 Fax (781) 937-1014
>
>
>
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