Hi all,
I would like to schedule the next LRM committee meeting on the 17th of January, 1:30pm Pacific time (instead of 10th January as per the original plan that we decided in our last call). Hope this is fine with everybody and apologize for the late notice for changing the date.
Martin,
Would it be possible to send the updated proposal for the $table_model that was being worked upon?
Also there was a request from Micahel Mirmak of IBIS forum (I/O buffer Information Spec) to make a presentation to the VerilogAMS committee and would like to discuss this as part of the agenda.
I would send a complete agenda during the week.
Regards,
Sri
-- Srikanth Chandrasekaran Freescale Semiconductors, Australia Ph: +61-8-8168 3592 Fax: 3501Received on Sun Jan 9 23:43:13 2005
This archive was generated by hypermail 2.1.8 : Sun Jan 09 2005 - 23:43:22 PST