FW: LRM Committee meeting

From: Chandrasekaran Srikanth-A12788 <Srikanth.Chandrasekaran@freescale.com>
Date: Mon Jan 17 2005 - 16:20:57 PST

Forwarding description of data format from $table_model on behalf of Patrick.

Cheers,
Sri

-----Original Message-----
From: Patrick O'Halloran [mailto:patrick@tiburon-da.com]
Sent: Wednesday, 12 January 2005 4:18 PM
To: 'Martin O'Leary'; Chandrasekaran Srikanth-A12788
Subject: RE: LRM Committee meeting

Hi Sri,

Here's a short description of the data format used by $table_model() (as I understand it). I'm describing "ordered isolines" only, not the scattered data format that I think must also be supported at some point. I think it's valuable to describe the format associated with the current proposal and take it from there. I've sent this to Martin previously. I also have some additional user input from customers interested in using Verilog-A for data-based modeling, I will prepare those inputs later.

Feel free to share this with the discussion group if you wish.

Regards,

Patrick

Patrick O'Halloran
Tiburon Design Automation
patrick@tiburon-da.com
707-694-2013 (cell)
707-541-7343 (office)

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$table_model Input Data Format - Ordered Isolines
-------------------------------------------------
The table model function is a multidimensional interpolator. The multidimensional function samples may be described to $table_model in one of two ways,

- as a scattered set of points in N-space
- as an ordered set of isolines in N-space

Here we will describe what we mean by 'ordered isolines.' It's most simple to give an example. The static characteristic of a bipolar transistor is usually described by a set of DC I-V characteristics. Each characteristic is generated by holding the base current constant (Ib) and sweeping the collector voltage (Vcc) from 0 to some maximum voltage. A family of curves is generated, with each curve representing a constant value of base current.

Each I-V curve may be called an isoline, or perhaps an isoline in Ib. That is, Ib is held constant and Vcc is varied. Vcc may be varied in any way. As long as Ib is held constant, we remain on a particular isoline in Ib. However if we vary Vcc monotonically over some range, we now say we have an ordered isoline in Ib.

When we have data arranged in a set of isolines we can talk about the 'innermost' dimension of the data and the 'outermost', or equivalently the fastest and slowest changing independent variables associated with the ordered set of isolines. In this example Vcc in the innermost dimension, Ibb is the outermost.

The $table_model() function accepts ordered isolines in N-space. M points are specified by supplying M rows of data each having N+1 columns. Each row consists of the coordinates of the isoline followed by the actually value of the function itself. The fastest changing isoline coordinate appears to the left, the slowest to the right. This is most easily understand by looking at a simple example.

Let's say we are to sample the function

z = f(x,y) = x^2+y

and we sample it on a set of 3 ordered isolines in y. For simplicity the x values are all the same and equispaced on each isoline.

y=1,2,3 x=1,2,3,4

Isoline 1: y = 1
x = 1, 2, 3, 4
z = 1, 5, 10, 17

Isoline 2: y = 2
x = 1, 2, 3, 4
z = 3, 6, 11, 18

Isoline 3: y = 3
x = 1, 2, 3, 4
z = 4, 7, 12, 19

In table model input format this data looks like:

# x y z
1 1 1
2 1 5
3 1 10
4 1 17
1 2 3
2 2 6
3 2 11
4 2 18
1 3 4
2 3 7
3 3 12
4 3 19

Here we can see x varies most quickly, it is the innermost independent, and y most slowly, it is the outermost independent. Also, in this example data is arranged on a manhattan grid - each ordered isoline is sampled at the same points in the x dimension. This does not need to be the case. Each ordered isoline may be sampled at a unique set of points, with the only constraint being that the samples be either monotonically increasing or decreasing.

If multidimensional data is supplied via a set of Verilog-A 1-D arrays the layout is the same.

The table model data format is neither the most convenient nor optimum for describing ordered isolines as the isoline ordinate must be repeated at each point. The higher the dimension of the data, the more cumbersome the layout. The underlining interpolation algorithm may be tied to the format, in which case it may be wise to modify the structure of the input file, so that users are clearly supplying scattered points or ordered isolines.

The simple repeated layout allows the file to be read directly into a spreadsheet and possibly other graphing tools. It may also be easily generated from a Verilog-A module.

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==================

> -----Original Message-----
> From: owner-verilog-ams@eda.org
> [mailto:owner-verilog-ams@eda.org] On Behalf Of Martin O'Leary
> Sent: Tuesday, January 11, 2005 9:37 PM
> To: Chandrasekaran Srikanth-A12788; Verilog-AMS LRM Committee
> Subject: RE: LRM Committee meeting
>
>
>
>
> >-----Original Message-----
> >From: owner-verilog-ams@eda.org
> [mailto:owner-verilog-ams@eda.org] On
> >Behalf Of
> Chandrasekaran Srikanth-A12788
> >Sent: Sunday, January 09, 2005 11:44 PM
> >To: Verilog-AMS LRM Committee
> >Subject: LRM Committee meeting
> >
> >
> >Hi all,
> >
> >I would like to schedule the next LRM committee meeting on
> the 17th of
> >January, 1:30pm Pacific time (instead of 10th January as per the
> >original plan that we decided in our last call). Hope this
> is fine with
> >everybody and apologize for the late notice for changing the date.
> >
> >Martin,
> >Would it be possible to send the updated proposal for the
> $table_model
> >that was being worked upon?
>
> Yes I will give an update on this topic. I have been some
> input from additional input from customers that I would like
> to bring to the committee and I would also like to present
> what I have captured from the discussions so far.
>
> Thanks,
> --Martin
>
> >
> >Also there was a request from Micahel Mirmak of IBIS forum
> (I/O buffer
> >Information Spec) to make a presentation to the VerilogAMS committee
> >and would like to discuss this as part of the agenda.
> >
> >I would send a complete agenda during the week.
> >
> >Regards,
> >Sri
> >--
> >Srikanth Chandrasekaran
> >Freescale Semiconductors, Australia
> >Ph: +61-8-8168 3592 Fax: 3501
>
>
>
>
Received on Mon Jan 17 16:22:29 2005

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