analog vs digital domains of variables

Hi, Sri -
A certain commercial simulator started complaining about
variables in my Verilog-A module that were declared but
not assigned a value.  The simulator took the view that
if the variable is not assigned a value in the analog
block (the analog context), then it is a digital variable.

However, in this case, the variable was *declared* in
a named block in the analog block.  Is it not clear in
this case that the variable belongs in the analog domain?
Is it legal to declare a variable in the analog block
and then assign a value to it in a digital context?
If not, then should section 8.2.2 explictly say the
domain is determined by where the variable is declared,
or if declared at module scope, by where it is assigned.

module am_i_legal(a);
  inout a;
  electrical a;
  analog begin : the_analog_block
    real x;
    V(a) <+ x;
  end

  initial begin
    the_analog_block.x=1;
  end
endmodule


-Geoffrey