Just had another look at the functions, but there is indeed a restriction on using only scalars in user-defined functions as expressed by the LRM section 4.6 and the BNF in Annex A of the LRM. Even though the input/inout/output declarations do not disallow the use of array arguments, the declarations for the direction and the type have quite different structures: `include "disciplines.vams" module vsourcea(a, b); inout a; inout[0:3] b; electrical a; electrical[0:3] b; genvar k; analog function real sumarray; input[0:3] nums; real nums[0:3]; sumarray = nums[0] + nums[1] + nums[2] + nums[3]; endfunction real nums[0:3]; analog begin for (k = 0; k <= 3; k++) begin nums[k] = V(a, b[k]); V(a,b[k]) <+ sumarray(nums); end end endmodule Now compare the heading of the function with that of the module - seems a bit odd, I think. Is there - by the way - any simulator currently around that can correctly handle the above (legal!) Verilog-A code? Marq Kole Competence Leader Analog Simulation, Philips ED&T owner-verilog-ams@eda.org wrote on 15-08-2005 17:27:19: > > Having recently tried to get some more complicated code to work in > Verilog-A, I had a long and hard look at the user-defined functions. > There are a couple of issues here that I think need to be addressed: > <SNIP> > > 3. I have always understood that functions can only accept scalar > values, however there is no indication in the BNF that this > restriction is real. In calling a function there is no limitation in > providing an array variable or array parameter. Moreover, these are > not limited to scalar entities, but can be arrays as well. Also this > is not mentioned anywhere in the LRM section 4.6.1. > > 4. Given that there is no limitation on the arguments to use arrays, > we should also lift the limitation that a function can only return a > scalar value, as there is no need to do so. > <SNIP>Received on Tue Aug 16 02:24:50 2005
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