RE: parameter definition in user-defined function

Hi Marq,


          analog begin 
            for (k = 0; k <= 3; k++) begin  

 <snip>
Is there - by the way - any simulator currently around that can correctly handle the above (legal!) Verilog-A code? 
 
No sir, not legal with k++ in there ;-) (should be k=k+1). 
 
Coming to the question of being able to pass in arrays into analog functions, I think this should be supported in Verilog-AMS. Please go ahead and add this to the mantis database ( http://www.eda.org/mantis/ <http://www.eda.org/mantis/>  )
 
Best regards,
Prasanna