parameter definition in user-defined function

All,

Having recently tried to get some more complicated code to work in 
Verilog-A, I had a long and hard look at the user-defined functions. There 
are a couple of issues here that I think need to be addressed:

1. It is possible to define a parameter in the user-defined function 
heading, but the only possible use for this is as a constant. It is then 
also possible to define an array parameter, but again, just as a constant 
array. The same can be achieved by a local variable which is given a 
value, or just a compiler macro - and probably with the same efficiency in 
a good optimizing compiler. Is there any need to retain the parameter 
definition in the user-defined function syntax? The use of the parameter 
definition is not mentioned anywhere in section 4.6.1.

2. The BNF of the user-defined function refers to input, inout, and output 
declarations, but these are defined in the digital part of the standard. 
As such, they should be noted as digital_input_declaration, etc.

3. I have always understood that functions can only accept scalar values, 
however there is no indication in the BNF that this restriction is real. 
In calling a function there is no limitation in providing an array 
variable or array parameter.  Moreover, these are not limited to scalar 
entities, but can be arrays as well. Also this is not mentioned anywhere 
in the LRM section 4.6.1.

4. Given that there is no limitation on the arguments to use arrays, we 
should also lift the limitation that a function can only return a scalar 
value, as there is no need to do so.

Of course, I am totally unaware of the user-defined functions allowed by 
System-Verilog, so if these limitation are in any sense absent from the 
to-be-merged standard, we can essentially discard the Verilog-AMS 2.2 
versions of the functions as such.

Regards

Marq Kole
Competence Leader Analog Simulation, Philips ED&T