re-sending for Shalom (unclear to me why it bounced) "Bresticker, Shalom" wrote: > > 1364-2005, final version, adds the following in subclause 5.5.2: > > "Propagate the type and size of the expression (or self-determined > sub-expression) back down to the > context-determined operands of the expression. In general, any > context-determined operand of an operator shall be the same type and > size as the result of the operator. However, there are two exceptions: > > 1) If the result type of the operator is real, and it has a > context-determined operand that is not real, that operand shall be > treated as if it were self-determined and then converted to real just > before the operator is applied." > > What this basically means is that in general, you first determine the > size and type of the result, coerce/convert all the context-determined > operands to that type and size, and only then start to evaluate the > expression. > > If that were to hold when the result type is real (i.e., when any > context-determined operand is real), then all the operands would be > converted to real, and only then would evaluation start. > > But reals are an exception. (See > http://www.boyd.com/1364_btf/report/full_pr/83.html > (Mantis 1011) and > http://www.boyd.com/1364_btf/report/full_pr/282.html.) > > Conversion to real is not done at the beginning, only just before the > operation is performed. So in the case of "a = 5.0 + 1/2;", 1/2 is still > performed as integer division, and 0 is converted to 0.0 for the > addition to 5.0. > > This is the way Verilog-XL was implemented and thus it became legacy > which everyone copied. I think maybe C also works this way, but even if > not, it is a fact which is not going to change now. > > With respect to division by 0.0 for reals, I filed an ETF issue on it. > See http://www.boyd.com/1364_btf/report/full_pr/273.html (Mantis 1225). > See also http://www.boyd.com/1364_btf/report/full_pr/274.html > (Mantis 1226). > > Shalom > > > -----Original Message----- > > From: owner-verilog-ams@eda.org [mailto:owner-verilog- > > ams@eda.org] On Behalf Of Geoffrey.Coram > > Sent: Wednesday, December 14, 2005 8:51 PM > > Cc: verilog-ams@eda.org > > Subject: Re: Definition of integer division > > > > Kevin - > > OK, I had been searching for "coerc" when I found that one > > statement. A few paragraphs above, I found this: > > > > - Expression type depends only on the operands. It does ot > > depend on the LHS (if any). > > > > followed by > > - For non-self-determined operands the following rules apply: > > if any operand is real, the result is real; > > > > > > If I have > > real a; > > a = 5.0 + 1/2; > > > > then I guess "1/2" is an expression (and its type is > > integer), and thus "integer division" is performed > > (no coercion is needed). > > > > At first I thought "5.0 + 1/2" was the expression. > > > > > > I'm still a little concerned about the sentence (in 4.1.5) > > For the division or modulus operators, if the second operand > > is a zero, then the entire result value shall be x. > > > > because "x" doesn't make sense in an analog context. > > > > -GeoffreyReceived on Thu Dec 15 03:45:50 2005
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