Date: 28th March 2006 Attendees: Geoffrey Coram Martin O'leary Patrick O'Halloran Jim Barby Arpad Muranyi Prasanna Tamhankar Jonathan David Graham Helwig Marq Kole Sri Chandra * Approval of "minor" mantis items posted by Geoffrey - Most of the items required minor corrections, typos in the current existing LRM - All the following items/proposals were approved at the meeting (838, 843, 848, 852, 854, 856, 867, 920, 023, 1390) - 1389: noise_table extrapolation is yet to be decided. The LRM is unclear how the values outside the array bounds should be treated. Most committee members found it acceptable to clamp the values to the lowest or upper most values when going outside array bounds. Martin wanted to check with Cadence team before agreeing to that issue. - It was suggested that the summary contain the section/Annex number to make it easier while doing the updates to see other relevant issues in that section. This action item on Sri was duly completed by Geoffrey for the urgent priority ones. :) (thanks Geoffrey) * Timelines for individual updates - There was a request for Graham to post the frame version of the BNF/Syntax to all the authors, so that updates could be done more easily on the individual sections - BNF for the compiler directives would be excluded out of the syntax (Annex A) and explained as part of the compiler directives section in the LRM. Same with the detailed syntax for system tasks and functions - Chapter 1 (unassigned, not much change) - Chapter 2: Lexical Conventions (Graham will post this document after cleanup in 2 weeks, he is having difficulty in getting access to frame version). An initial version is available. - Chapter 3: Datatypes (Geoffrey, 2 weeks after the completion of Chapter 5) - Chapter 4: Expression (This is currently assigned to Prasanna. He doesnt have access to frame and might have to be reassigned) - Chapter 5: Signals (Geoffrey, Initial work has been done, this should be available for review mid-April) - Chapter 6: Analog Behavior (Sri, this will be posted 2 weeks after the review of chapter 9) - Chapter 7: Hierarchical Structures (Arpad, Marq: Could be done in 2 to 4 weeks. Mid May) - Chapter 8: Mixed Signal (Not expecting too many changes as LRM2.3 doesnt impact mixed signal resolution - Currently assigned to Prasanna and might have to be reassigned) - Chapter 9: Scheduling Semantics (Sri, plan to have it ready by mid-April. Not much changes as LRM2.3 hasnt impacted this chapter much) - Chapter 10: System Tasks and Functions (Martin, Plan to have it for submission around mid June. This chapter would require some rework and updates to expand the BNF syntax for individual sections and also analyze the usage of tasks and functions in mixed context) - Chapter 11 - Compiler Directives (Graham, Initial version of the document is being worked on - expected to be submitted by Mid May) - Chapter 12/13 - VPI: Currently unassigned. Will need to be reviewed after individual section updates are done - Annex A: Syntax (Graham, document ready in pdf format, request for frame version to be sent across) - Annex E: Spice extensions (Marq, only minor updates required in this section. Example testcases/verilog-A versions of Spice primitives will not be part of this LRM and will be a seperate document) - Jim requested that Annex G (changes from previous version of LRM) be reinstated. This was dropped in one of the earlier versions. There is a changebar version for LRM2.2 so this document will be updated from the previous version. - It looks like the individual sections will be updated and reviewed by late June / early July. The committee agreed that it will be very difficult to release this by June/July timeframe as initially agreed upon by the technical committee and Accellera. Need to update this status to the Accellera chair as there is a delay of about 2-3 months atleast for the release of LRM2.3 version. * Call time for calls going forward - Calls will be scheduled for 1:30pm Pacific Daylight Savings time on tuesday as agreed upon by all the members. Regards, Sri -- Srikanth Chandrasekaran DTO, Tools Group Freescale Semiconductors Inc. Ph: +61-(0)8-8168 3592 Fax: x3201Received on Mon Apr 3 20:53:08 2006
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