Geoffrey, Thanks for the trivial solution example. I wonder though, how efficient it is? It seems that the condition in the IF statement will need to be evaluated twice at EVERY analog iteration this way. I could perhaps do @(above(abs(expr))) but this will also need an extra calculation for each iteration. Not knowing too much about the internals of simulators I am curious how much this costs computationally? Thanks, Arpad ===================================================== -----Original Message----- From: geoffrey.coram@analog.com [mailto:geoffrey.coram@analog.com] Sent: Wednesday, April 12, 2006 9:45 AM To: Muranyi, Arpad Cc: Verilog-AMS LRM Committee Subject: Re: Question about above() and cross() Arpad - I didn't like above(); I had hoped to get cross() extended somehow to trigger in dc analysis, but there was a backwards-compatibility concern. Of course, trivially, @(above(expr) or above(-expr)) will trigger for a crossing in either direction. -GeoffreyReceived on Wed Apr 12 09:51:01 2006
This archive was generated by hypermail 2.1.8 : Wed Apr 12 2006 - 09:51:03 PDT