Re: Regarding support of wreal

Shalom,
And all this time I thought you were trying to make the case for why 
we didn't need it.. 
 
----- Original Message ----
From: "Bresticker, Shalom" <shalom.bresticker@intel.com>
Subject: RE: Regarding support of wreal

I've just been explaining why wreal is so different from wire, and it
does not make sense to look at wreal as just another type of the Verilog
wire kind.
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And I definitely agree.. 
 
I guess this makes clear though that WREAL is a Behavioral Modeling ONLY
construct - and can't be directly associated with any specific physical behavior
along a wire or into or out of a transistor. 
1'b0 1'b1 1'bz 1'bx, 
voltages and 
currents, 
Electric and Magnetic fields,
Resonator Position, -> plate distance -> capacitance 
are ALL things that can be resolved somehow in a connection.. 
But Wreal is about the ONLY signal type Currently in the language that 
doesn't have a way to be resolved to another signal type automatically... .
Ironically, probably because its not "real" enough!!! (sorry)
Vreal could be.. 
Ireal could be 
 
We could make the idea that for EACH analog nature we can create an associated
discrete time, continous valued discipline like wreal, but that would resolve to that nature.. 
 
since the family of disciplines is user programmable this would have to be also.. 
 
As long as you treated it the way I do wreal today, the resolution function wouldn't come into play.. 
but If it connected to  a transistor or a logic gate, It would get converted to the appropriate analog nature, connect to the net, 
and then the E2L connectRule would have to have the appropriate load (resistance, capacitance etc) not to break the simulation.
 
I think something like that is MORE on the lines of what Kevin would like to see.. 
 
For now, wreal fills my need - as long as I think of it as a behavioral modeling technique that spans the entire signal path.