Marq - I don't think the compact model writer should have to worry about whether "nodeset" or "ic" is the right thing for doing his initialization. It is entirely possible for the compiler to figure out everything it needs to know; this is the beauty of using a high-level language like Verilog-A! Again, analysis("nodeset") will be true for every iteration of that phase, whereas the geometry processing only needs to be done the first iteration; and conversely, analysis("nodeset") will be false for subsequent steps of a dc sweep, even though a geometric parameter may be swept. I like ADMS's use of initializeModel and initializeInstance for the reason that it makes the model writer organize the code logically. When reading the code, it also makes it look like the blocks are only done once -- though the compiler may execute it more than that. -Geoffrey Marq Kole wrote: > > Geoffrey, > > First, I should say that I like the style: it is structured and readable. Still, I do think analysis() calls add to the comprehensability (?) of the code. > > Your examples below obviously give the wrong, i.e. bad use of analysis codes. However, wouldn't you agree that analysis("nodeset"), analysis("static") and analysis("ic") refer more to phases during the simulation, irrespective of the actual simulation type? So using f.ex. analysis("nodeset") to restrict execution of the geometry processing and f.ex. analysis("static") for the thermal processing would not have the problems you indicate below with explicit analysis types, but would have the advantages of making the limited execution of these initializing sequential blocks explicit. > > Marq > > Marq Kole > Competence Leader Analog Simulation, Philips ED&TReceived on Mon Aug 28 05:45:51 2006
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