In 1364, there is no such thing as a string data type. There is a string literal, which can be thought of a special representation of an integer vector. An n-character string is an 8*n bit unsigned integer. So you can assign a string literal to a parameter. Similarly, in 1364 there is no such thing as a string register. The register contents are identical whether you think of them as a string or as an integer. The register size is constant, though. SystemVerilog added a string data type, which is a dynamically sized type. Shalom > -----Original Message----- > From: owner-verilog-ams@server.eda.org [mailto:owner-verilog- > ams@server.eda.org] On Behalf Of Dave Miller > Sent: Tuesday, November 14, 2006 7:22 PM > To: Verilog-AMS LRM Committee > Subject: Why is type for string parameters mandatory? > > Hi all, > I am just wondering why do we explicitly say that the type specification > for a string parameter is mandatory? > Why can't we allow the type to be derived based upon the default > expression. > Do you think we could remove this restriction in 3.2.1 and just mention > that if no type is specified and the parameter is assigned a default > value of a string, then the type of the parameter will be string and it > will be an error if the parameter is overridden with any numerical > value. > This is causing me some problems at the moment as some digital > simulators that I am using allow string parameters to be defined without > the type. In fact if I understand digital correctly (2005) you can't > actually have a string parameter (only string registers) but that is a > separate issue. > > Dave > > -- > ===================================== > -- David Miller > -- Design Technology (Austin) > -- Freescale Semiconductor > -- Ph : 512 996-7377 Fax: x7755 > =====================================Received on Wed Nov 15 05:05:23 2006
This archive was generated by hypermail 2.1.8 : Wed Nov 15 2006 - 05:05:50 PST