In Verilog 1364-2005, a variable declaration assignment has to be a constant expression (which allows constant functions, but not non-constant functions), but is executed as though in an initial construct. SystemVerilog is a little different. 1800-2005 says, "In Verilog, an initialization value specified as part of the declaration is executed as if the assignment were made from an initial block, after simulation has started. In SystemVerilog, setting the initial value of a static variable as part of the variable declaration (including static class members) shall occur before any initial or always blocks are started. Initial values in SystemVerilog are not constrained to simple constants; they can include run-time expressions, including dynamic memory allocation. For example, a static class handle or a mailbox can be created and initialized by calling its new method (see 14.3.1), or static variables can be initialized to random values by calling the $urandom system task. This requires a special pre-initial pass at run time." Shalom ________________________________ From: edaorg@v-ms.com [mailto:edaorg@v-ms.com] Sent: Monday, December 25, 2006 12:19 AM To: verilog-ams@verilog.org Cc: Bresticker, Shalom Subject: Re: multiple analog blocks Bresticker, Shalom wrote: Are you guys really disagreeing with each other? Shalom I was just looking for some clarification. The restriction that the functions should be "analog functions" probably applies to calls in initialization code in an "initial step" block within an analog block since that code is involved in solving the circuit matrix. If the code in question is setting up variables and other initial conditions prior to attempting solving the matrix (and won't be called during the solving process) then there is no requirement (that I can see) for the function calls being constant. I.e. if the code is in an initial block rather than an analog block or just in the variable declaration calls don't have to be constant. Kev. Dave Miller wrote: Kevin Cameron wrote: With this we could then simply use constant functions and then we have a ready to go method to perform complex pre-simulation initialisation. What's telling the compiler it's a constant function, and does it have to be? Any analog user defined function who's arguments are constant (parameters, numbers) is a constant function, as they can be solved pre-simulation with no dependencies on a matrix etc. I would love to see more use of constant analog functions, if only as an alternative to users writing function macro's to do the same thing. As with all macro's in any language, debugging them can sometimes be a challenge. I don't see the need for the function to be a constant or analog if it is just being used for initialization and is not inside an analog block.Received on Sun Dec 24 22:53:19 2006
This archive was generated by hypermail 2.1.8 : Sun Dec 24 2006 - 22:53:30 PST