Re: Verilog-AMS Committee Meeting Minutes - Dec 22 2006

edaorg@v-ms.com wrote:
> Boris Troyanovsky wrote:
>> If concurrent multiple analog blocks are incorporated into the standard,
>> then I think it should be possible to formally prohibit constructs that
>> result in indeterminate switch branch values. The standard currently says
>> (5.3.1.3):
>>
>> "It is illegal to contribute to an external switch branch from within an
>> analog block."
>>
>> [ Presumably, this means to contribute via a hierarchical out-of-module
>> reference. ]
>>   
> IMO the statement in 5.3.13 is fairly meaningless: there is no way 
> from within a module that you can tell that a branch you are 
> connecting to is a switch branch in some other module (doesn't matter 
> if it's OOMR or not). So if it is illegal it's going to be a 
> elaboration/runtime error, but personally I see no reason for it to be 
> illegal. I'd vote for striking the sentence.

Well I'm not too sure on that, I think that is very implementation 
specific. I can certainly tell if a hierarchical contribution to a 
branch turns it into a switch branch. I would certainly prefer to keep a 
restriction in place that prevents users contributing hierarchically to 
switch branches. It seems to me that it would be more likely something 
they would do accidentally, so would probably like to be warned about it.

Dave

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-- David Miller
-- Design Technology (Austin)
-- Freescale Semiconductor
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