I believe that it should only be described in section 4.1.1 and all other sections that discuss about using reals in place of integers should refer to this section. Marq Kole wrote: > All, > > And the same text is also present in subsection 4.1.1.1 - do we really > need to hammer this home? :-) > > Cheers, > Marq > > owner-verilog-ams@server.eda.org wrote on 16-10-2007 15:14:14: > > All, > > > > The current Verilog-AMS update proposals for chapter 2 and chapter 3 > > contain duplictae information: the first paragraph of section 3.1.1 > > is essentially the same as section 2.5.4. Considering that > > conversion is not a lexical convention I would suggest to remove it > > from section 2.5.4 and provide the additional examples of conversion > > in this subsection to section 3.1.1. > > > > Cheers, > > Marq > > > > -- > > This message has been scanned for viruses and > > dangerous content by MailScanner, and is > > believed to be clean. > -- > This message has been scanned for viruses and > dangerous content by *MailScanner* <http://www.mailscanner.info/>, and is > believed to be clean. > -- ===================================== -- David Miller -- Design Technology (Austin) -- Freescale Semiconductor -- Ph : 512 996-7377 Fax: x7755 ===================================== -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Tue Oct 16 06:36:17 2007
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