Fw: more Clause 3 comments

From: Jonathan David <jb_david_at_.....>
Date: Thu Jun 05 2008 - 12:22:15 PDT
the list was in the cc list .. 
forgot to reply to all

 Jonathan David
j.david@ieee.org
jb_david@yahoo.com
http://ieee-jbdavid.blogspot.com
Mobile 408 390 2425


----- Forwarded Message ----
From: Jonathan David <jb_david@yahoo.com>
To: David Miller <David.L.Miller@freescale.com>; Nourdine Belhous <nourdine_belhous@mentor.com>
Cc: Verilog-AMS LRM Committee <verilog-ams@eda.org>
Sent: Thursday, June 5, 2008 12:19:57 PM
Subject: Re: more Clause 3 comments

the one I use every day (the product of a former employer of mine) 
leaves the wire to z but the reg to x .. 
makes sense to me.. if the net has no drivers - the value is undriven (z)
if the net has a driver (ie a reg) but its value is not known.. its value should be unk (ie x)
1. we should carefully look at what 1364-2005 has to say about this.. and check to see if the simulator
that is NOT following the standard as written has a switch to enable the conforming option.. 
(or if your environment setup in the other one has some pli or something that turns all z to x.. - or a command line option)

See 1364-2005 4.2.1
the one that has the net at X is NOT conforming to the (latest) verilog standard.. 
at least as setup on your site.. 
jbd




Jonathan David
j.david@ieee.org
jb_david@yahoo.com
http://ieee-jbdavid.blogspot.com
Mobile 408 390 2425


----- Original Message ----
From: David Miller <David.L.Miller@freescale.com>
To: Nourdine Belhous <nourdine_belhous@mentor.com>
Cc: Verilog-AMS LRM Committee <verilog-ams@eda.org>
Sent: Wednesday, June 4, 2008 9:28:40 AM
Subject: Re: more Clause 3 comments

Hi Nourdine,
Thanks, I changed my example to be 'wire mywire' instead.
Unfortunately, when I tried this with two different commercial digital 
simulators, one gives
   mywire = x

the other
   mywire = z

So even the pure digital simulators don't seem to agree.

Cheers...
Dave


Nourdine Belhous wrote:
> Hi,
> If you want to test the initial value of a net, you should declare a 
> wire (or anything specified as a net in the digital LRM) instead of a 
> register.
> And you'll probably get a value of 'z' from the simulator.
> 
> Nourdine BELHOUS.
> 
> David Miller wrote:
>>
>>>
>>> 3.7: "Unlike other digital nets which have an initial value of ‘x’,..."
>>> Digitial nets have an initial value of z, not x.
>>>
>>
>> I am confused.
>> If I have:
>>
>> module test;
>> reg myreg;
>> initial $display("myreg = %b",myreg);
>> endmodule
>>
>> Digital simulators print:
>>   myreg = x
>>
>> How is this value different from the initial value of myreg?
>>
>>
>> Dave
>>
>>
>>
> 
> 

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Received on Thu Jun 5 14:09:13 2008

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