Should the language enforce that port directions are honored?
Specifically ports that are defined as input, should it be a error if you
contribute to a branch containing that port?
module mymod(a,b);
electrical a,b;
input a,b;
analog V(a,b) <+ 5;
endmodule
Should this be an error, since a,b are input?
-- ============================================== -- It's a beautiful day -- Don't let it get away -- -- David Miller -- Design Technology (Austin) -- Freescale Semiconductor -- Ph : 512 996-7377 Fax: x7755 ============================================== -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Wed Jun 2 12:00:47 2010
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