A DSP-based decompressor
unit for high-fidelity MPEG-Audio over TCP/IP networksA DSP-based decompressor
unit for high-fidelity MPEG-Audio over TCP/IP networks[ Home | Contents | Component and tool archive ]
Previous chapter: Appendix D
When the finished, soldered Whitney PCB finally arrived, the testing phase could begin. There were several things that could potentially cause the board to function incorrectly:
Since the DSP-program does not exist in a ROM, but is booted at startup from the parallel port, it was essential for proper operation that the parallel-to-serial converter was working otherwise no program could be run by the DSP, so after the board had survived the initial power-on, it was the first thing that was tested.
The first test of downloading the bootprogram through the parallel port from a normal PC failed. Oscillioscope examination of the states of the parallel-to-serial converter state machine showed that it performed illegal state transitions when new bytes from the parallel port were latched. The prime suspect cause was electrical noise from the PC, and closer examination of the STRB line revealed that it did not even remotely resemble the nice transition specified in the Centronics handshake. The activation was quite clean but the de-activation rise was spread out in time like if it had been low-pass filtered. The consequence was that as it rose monotonically, at some point it would fall between the 0 and 1 CMOS electrical levels, and cause half the latches in the MACH chip to detect it as a 0 and the other half to detect it as a 1, and thus the state machine would crash badly. This was resolved by inserting an additional latch stage of the STRB signal in the MACH logic, so that the signal would at least be decoded as the same value by all state machine registers, which turned out to work perfectly. However the real fix to the problem would have been to insert a Schmitt-trigger on the signal, where the resulting hysteresis would remove the ambiguity of the 0->1 transition.
Another problem appeared with the assumed power-on reset of the MACH's registers. They were simply not reset to 0 in some cases, so an implicit RESET_BY directive was added to the registers' properties, linking the reset to an external pin of the chip. The on-board reset-generator's signal, used for the reset of the DSP, was connected to this MACH pin with a patch wire. When this was done, the board started to boot and run DSP programs over the parallel port without any errors.
When the hardware was up and running, it was time to debug the software (the MPEG audio decoder). Some small bugs relating to the stereo processing of the signal were found and corrected - they were hard to diagnose earlier with the DSP DSK since it only provided a mono-output. The decoder also ran a bit too slow, causing glitches to happen in demanding parts of the MPEG stream. This was resolved by making some small optimizations of the GCC compiler to generate better DSP assembler code.
Unfortunately some faint digital noise was sneaking into the analog audio outputs of the D/A converter circuit. Care had been taken to shield the analog parts from the noisy digital parts using cuts in the powerplanes, but apparently it was not good enough to keep it totally apart.
Previous chapter: Appendix D
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