Products/Services

To learn more about the Synopsys Alliance Series solution, select one of the topics below: 

Synopsys FPGA/CPLD Product Summary 
The Following Entries are links to Synopsys' WEB pages 

• FPGA Compiler 
• FPGA Compiler II
• FPGA Express
• Design Compiler 
• VSS 
• SmartModels (LMG)

Click here for a free evaluation copy of FPGA Express 

Xilinx Alliance Series Product Summary 
The Following Entries are links to Xilinx' WEB pages 

• Alliance Series Configuration

New Alliance Series 1.3 Configuration 
• Xilinx/Synopsys Alliance Series 1.3 Product Highlights 

Benefits of Xilinx-Synopsys Alliance Series

• Xilinx Alliance 1.3 Series Delivers 

• Dramatically improved design performance though advanced placement and routing algorithms 
• Powerful "Auto-Interactive" tools that deliver a choice of push-button or manually-directed design methodologies 
• Improved support for standards-based design flows and high level design methodologies including EDIF, SDF, VHDL (VITAL) and Verilog 
• Support for the industry's highest density, highest performance, 2.5 volt FPGAs (125,000 gates) 
• Industry's leadership in premier EDA partnerships 
• 100% Backannotation 
• Next Generation Module Generation with LogiBLOX
 
• Alliance Series 1.3 XSI Delivers
• Xilinx Architecture Synthesis Libraries 
• Instantiated LogiBLOX 
• High Performance DesignWare Synthesis Libraries 
• Efficient Synthesis of I/O 
• Synopsys Timing Constraints Translation (DC2NCF)  
• Accurate Area and Timing Estimation with Easy-to-Read Reports 
• RTL and Gate-level Timing Simulation Capability 
• Unified Simulation Libraries 
• VITAL Compliant Support for Synopsys VSS 
• XSI HDL Design Guide 
• Extensive Training and Documentation

See the "Technical Information" section for further Alliance Series 1.3 features for Synopsys.

Synopsys Product Summary

	Current Version	Next Release	Comments
HDL Entry
FPGA Compiler	1997.08  (8/97)	See FPGA Compiler II	Synopsys workstation solution.  Widely used by Xilinx major accounts.  Next version will be FPGA Compiler II.   Compatible with XACTstep5.0.1, A1.3 & A1.4.
FPGA Compiler II	n/a	1997.11  (12/97)	Synopsys workstation solution.   Combines FPGA Compiler for Design Compiler compatibility and FPGA Express technology for more ease-of-use and higher quality-of-results for FPGAs/CPLDs on UNIX. Scheduled to be supported with Xilinx A1.4 release.   Compatible with XACTstep 5.0.1 and A1.3.
FPGA Express	v1.2/1997.07 (7/97)	v2.0/1997.11  (12/97)	Synopsys PC solution with ease-of-use and high quality-of-results.  Supports 3K, 4KE/EX/XL, 5K, 9K. No 7K support. v2.0 additionally supports XC4000XV/S.   Compatible with XACTstep 5.0.1, A1.3, A1.4.   The Xilinx libraries and interfaces are included with Synopsys FPGA Express.
Design Compiler	1997.08  (8/97)	1998.02  (2/98)	1997.08 release contains no architecture specific optimization for Xilinx FPGAs/CPLDs.
HDL Simulation
VSS	1997.08  (8/97)	1998.02  (2/98)	VHDL Simulation. VITAL compliant.
HDL Analysis
RTL Analyzer  formerly   HDL Advisor	1997.08  (8/97)	1998.02  (2/98)	Name change in 1997.08 to RTL Analyzer.
Others
SmartModels			From Synopsys LMG (Logic Modeling Group).

Xilinx Alliance Series Product Summary