Acrobat Weblink plug-in

If you would like a subscription to the XCell journal, use the literature request form.  If you have comments, suggestions, or would like your design featured in XCell, e-mail editor@xilinx.com. 

In this Q3 '98 issue... 

Products 

Customer Success Stories 

Development System 

Special Section on Verification  Verification for Higher Productivity  Using Synopsys SmartModel FPGA Models to Verify Xilinx FPGA Designs  Mixed Schematic and HDL Design Entry  Verifying PCI Designs  Viewlogic's Mixed-Design Verification Methodology  The Basic Elements of HDL Simulation for FPGAs and CPLDs  Board Design and Simulation Using OrCAD Express  Post-Route Timing Analysis with Leonardo Spectrum  Verification Using a Self-Checking Test Bench

HDL Verification:  We Will Take You to The Leaders

Hints and Issues