Physical synthesis with PALACE is available only for ProASICPLUS, ProASIC3, ProASIC3E, and Axcelerator devices.
When you click Configure Design Flow in the Libero IDE Design Flow window you can choose to configure the flow and to use PALACE and enable physical synthesis (as shown below).
Configure Flow Dialog Box
The HDL project level options enable you to specify whether or not you want to generate your HDL netlists after synthesis.
Generate an HDL netlist immediately after synthesis - Select this option if you run post-synthesis simulation. If you do not run post-synthesis simulation, de-select this option to start Designer more quickly.
Generate an HDL netlist immediately after physical synthesis - Select this option if you run physical simulation. If you do not run post physical synthesis simulation, de-select this option to start Designer more quickly.
You can also choose to enable or disable synthesis if you are using a structural implementation. Synthesis is required for RTL modules and cannot be disabled.
Enabling physical synthesis with PALACE automatically creates a new project implementation in Libero and displays the PALACE icon in the Libero IDE Design Flow window. See the online help for more information on how to use the PALACE tool for physical synthesis.
To view this dialog box, click Configure Flow in the Libero IDE Design Flow window.