Floorplanning includes creating regions and making logic assignments to those regions. It is an optional methodology you can use to improve the performance and routability of your design. The objective in floorplanning is to assign logic to specific regions on the chip to enhance performance and routability.
When floorplanning, you analyze your design to see if certain logic can be clustered within regions. Clustering is especially helpful for hierarchical designs with plenty of local connectivity within a block. If your timing analysis indicates several paths with negative slack, try clustering the logic included in these paths into their own regions. This forces the placement of logic within the path closer together and may improve timing.
Use ChipPlanner before and after Layout to help you floorplan.
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