A region is a user-defined area on the device. When floorplanning, you can assign logic to regions to improve the design performance. You can use ChipPlanner to create regions or create them with PDC or GCF commands.
Note: You cannot create regions for ex and SX-A families.
ChipPlanner supports the following types of regions:
A Logic region is a region that has logic assigned to it. Logic may include core logic, memory, and I/O modules. The place-and-route tool will place all the logic assigned to a Logic region inside that region. The floorplanning process usually requires you to create several regions and assign logic to them.
Logic regions can either be inclusive or exclusive. If a Logic region is exclusive, it means that the place-and-route tool cannot place any logic within the region other than what you have previously assigned to it. If a Logic region is inclusive, the place-and-route tool can place any logic within the region. Exclusive regions are not supported for ProASIC and ProASIC PLUS devices. However, exclusive regions are supported for Fusion, ProASIC3E, and ProASIC3 devices.
To prevent logic from being placed within a predefined area in the device, you can create an empty region. The place-and-route tool will not place any logic within an empty region; however, the routing resources within the region can be used.
A LocalClock is a portion of the global clock network on the device. LocalClock regions are inclusive by default and cannot be changed. Each family has different LocalClock capabilities. For specific details, see the datasheet for your device.
A QuadrantClock is a portion of the global clock network on the device. Each family has different QuadrantClock capabilities. For specific details, see the datasheet for your device. You create and delete a QuadrantClock in the same way that you create a LocalClock in ProASIC3/E devices.
If you create Logic regions whose areas intersect, the regions are defined to be overlapping. The place-and-route tool will detect the area where these regions intersect and try to place logic common to both of them within this area.