Deactivating a specific inter-clock domain

To deactivate the inter-clock domain checking for the specific clock domains clk1->clk2, without disabling this option for the other clock domains:

1. From the Tools menu, choose Constraints Editor > Primary Scenario to open the Constraints Editor View.

2. In the Constraints Browser, double-click False Path under Exceptions. The Set False Path Constraint dialog box appears.

3. Click the Browse button to the right of the From text box. The Select Source Pins for False Path Constraint dialog box appears.

4. For Specify pins, select by keyword and wildcard.

5. For Pin Type, select Registers by clock names from the Pin Type drop-down list.

6. Type the inter-clock domain name, for example Clk1 in the filter box and click Filter.

7. Click OK to begin filtering the pins by your criteria. In this example, [get_clocks {Clk1}] appears in the From text box in the Set False Path Constraint dialog box.

8. Repeat steps 3 to 7 for the To option in the Set False Path Constraint dialog box, and type Clk2 in the filter box.

9. Click OK to validate the new false path and display it in the Paths List of the Constraints Editor.

10. Click the Recalculate All icon in the toolbar.

11. Select the inter-clock domain set clk1 -> clk2 in the Domain Browser (as shown below).

12. Verify that the set does not contain any paths.

Maximum Delay Analysis View

See Also

Understanding inter-clock domain analysis

Activating inter-clock domain analysis

Displaying inter-clock domain paths

Select Source or Destination Pins for Constraint dialog box

Set False Path Constraint dialog box