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/******************************************************************************/ 
/*                                                                            */ 
/* Copyright (c) 1999 Sun Microsystems, Inc. All rights reserved.             */ 
/*                                                                            */ 
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/* Community Source License, microSPARCII ("the License"). You may not use    */ 
/* this file except in compliance with the License.  You may obtain a copy    */ 
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/* obligations, and limitations governing use of the contents of this file.   */ 
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/* foreign patents, or pending applications.                                  */ 
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/******************************************************************************/ 
/***************************************************************************
****************************************************************************
***
***  Program File:  @(#)column70.v
****************************************************************************
****************************************************************************/

//  @(#)column70.v	1.1  4/8/92
//
// **************************************************************
//  column70 -- 10 to 2 compression for column 70.
// **************************************************************

[Up: array col70]
module column70  (
		    sum,		// compressed sum
		    carry,		// compressed carry
		    cout1,		// non-ripple carry-out
		    cout2,		// ripple carry-out
		    cin1,		// non-ripple carry-in
		    cin2,		// ripple carry-in
		    x,			// multiplicand
		    y			// multiplier
		    );
	//prop CELLCLASS "MODULE"
	//prop GENERATOR "DataPath"
	//prop TERMPLACE "BIT"

    output sum;
	//prop TERMPLACE "BOT"
    output carry;
	//prop TERMPLACE "BOT"
    output [12:9] cout1;
	//prop TERMPLACE "LEFT"
    output [11:8] cout2;
	//prop TERMPLACE "LEFT"
    input  [12:8] cin1;
	//prop TERMPLACE "RIGHT"
    input  [11:8] cin2;
	//prop TERMPLACE "RIGHT"
    input  [9:0] x;
	//prop TERMPLACE "TOP"
    input  [27:18] y;
	//prop TERMPLACE "LEFT"

    wire  [27:18] p;		// partial products
    wire  [12:8] cin1;
    wire  [11:8] cin2;
    wire  [11:8] s;		// internal sum's

    pproduct_2 pF (
	    p[19:18],
	    x[9:8],
	    y[19:18]
	    );
	    //prop TERMPLACE "POS=13"

    add2 aF  (
	    s[8],
	    cout2[8],
	    p[18],
	    p[19],
	    cin1[8]
	    );
	    //prop TERMPLACE "POS=14"

    pproduct_2 pJ (
	    p[21:20],
	    x[7:6],
	    y[21:20]
	    );
	    //prop TERMPLACE "POS=15"


    add4 aJ  (
	    s[9],
	    cout2[9],
	    cout1[9],
	    p[21],
	    s[8],
	    p[20],
	    cin2[8],
	    cin1[9]
	    );
	    //prop TERMPLACE "POS=15"

    pproduct_4 pG (
	    p[25:22],
	    x[5:2],
	    y[25:22]
	    );
	    //prop TERMPLACE "POS=16"

    add4 aG  (
	    s[10],
	    cout2[10],
	    cout1[10],
	    p[22],
	    p[23],
	    p[24],
	    p[25],
	    cin1[10]
	    );
	    //prop TERMPLACE "POS=17"

    add4 aL  (
	    s[11],
	    cout2[11],
	    cout1[11],
	    s[9],
	    s[10],
	    cin2[9],
	    cin2[10],
	    cin1[11]
	    );
	    //prop TERMPLACE "POS=18"

    pproduct_2 pM (
	    p[27:26],
	    x[1:0],
	    y[27:26]
	    );
	    //prop TERMPLACE "POS=19"

    add4 aM  (
	    sum,
	    carry,
	    cout1[12],
	    p[27],
	    s[11],
	    p[26],
	    cin2[11],
	    cin1[12]
	    );
	    //prop TERMPLACE "POS=19"

endmodule
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This page: Created:Thu Aug 19 12:03:12 1999
From: ../../../sparc_v8/ssparc/fpu/fp_fpm/rtl/column70.v

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