/******************************************************************************/
/* */
/* Copyright (c) 1999 Sun Microsystems, Inc. All rights reserved. */
/* */
/* The contents of this file are subject to the current version of the Sun */
/* Community Source License, microSPARCII ("the License"). You may not use */
/* this file except in compliance with the License. You may obtain a copy */
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/* */
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/******************************************************************************/
// @(#)exception.v 1.1 4/7/92
//
![[Up: fp_exp ae]](v2html-up.gif)
module Exception
(BM, SNnotDB, notBInfNaN, notBZeroDenorm);
input [12:0] BM
;
input SNnotDB
;
output notBInfNaN
, notBZeroDenorm
;
// Check the Master for InfNan or ZeroDenorm
// Inf or nan should also be set for any overflow, either single or
// double length, as this check is also used in rounding
ME_OR11 g10 (BM[10], BM[9], BM[8], BM[7], BM[6], BM[5],
BM[4], BM[3], BM[2], BM[1], BM[0], notBZeroDenorm );
// Force bits 10 to 8 high when single and AND them
ME_INVA g13 ( SNnotDB, DBnotSN
);
ME_NAND3 g12 ( BM[10], BM[9], BM[8], n10
) ;
ME_NAND2 g11 ( DBnotSN, n10, doublebits1
) ;
ME_AND8 zxd ( BM[7], BM[6], BM[5], BM[4],
BM[3], BM[2], BM[1], BM[0], All1s7to0
);
ME_OR3 zxe ( BM[10], BM[9], BM[8], Bit10Or8
);
ME_NAND2 g23 ( SNnotDB, Bit10Or8, notSNGrossOv
) ;
ME_NAND2 g22 ( doublebits1, All1s7to0, notAll1s
) ;
ME_INV_A g21 ( BM[11], notBit11
) ;
ME_AND3_B g20 ( notSNGrossOv, notAll1s, notBit11, notBInfNaN ) ;
endmodule
This page: |
Created: | Thu Aug 19 12:00:47 1999 |
| From: |
../../../sparc_v8/ssparc/fpu/fp_exp/rtl/exception.v
|