/******************************************************************************/
/* */
/* Copyright (c) 1999 Sun Microsystems, Inc. All rights reserved. */
/* */
/* The contents of this file are subject to the current version of the Sun */
/* Community Source License, microSPARCII ("the License"). You may not use */
/* this file except in compliance with the License. You may obtain a copy */
/* of the License by searching for "Sun Community Source License" on the */
/* World Wide Web at http://www.sun.com. See the License for the rights, */
/* obligations, and limitations governing use of the contents of this file. */
/* */
/* Sun Microsystems, Inc. has intellectual property rights relating to the */
/* technology embodied in these files. In particular, and without limitation, */
/* these intellectual property rights may include one or more U.S. patents, */
/* foreign patents, or pending applications. */
/* */
/* Sun, Sun Microsystems, the Sun logo, all Sun-based trademarks and logos, */
/* Solaris, Java and all Java-based trademarks and logos are trademarks or */
/* registered trademarks of Sun Microsystems, Inc. in the United States and */
/* other countries. microSPARC is a trademark or registered trademark of */
/* SPARC International, Inc. All SPARC trademarks are used under license and */
/* are trademarks or registered trademarks of SPARC International, Inc. in */
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/* are based upon an architecture developed by Sun Microsystems, Inc. */
/* */
/******************************************************************************/
/*** Description:
*** flash prom model for use in system boot.
****************************************************************************
****************************************************************************/
module flash_prom32
( addr,
data,
oe_l,
ce_l,
we_l,
cs_l,
b_sel, // added for boot_select
flash_pm
) ;
input [23:0] addr
;
inout [31:0] data
;
input oe_l
;
input ce_l
;
input we_l
;
input cs_l
;
input [1:0] b_sel
;
input flash_pm
;
reg [31:0] memori_32
[22'h3fffff:0];
reg [7:0] memori_8
[24'hffffff:0];
parameter ACCESS_TIME = 100 ;
wire [31:0] #ACCESS_TIME delayed_out
= (b_sel == 2'h0) ? memori_32[addr[23:2]] :
{24'bz,memori_8[addr]} ;
wire [31:0] data = (cs_l || oe_l) ? 'bz : delayed_out[31:0] ;
reg setup_data
;
reg write_done
;
initial
#40
begin
setup_data = 0;
write_done = 0;
end
always@(negedge cs_l)
if (oe_l == 1'b0)
begin
if (b_sel == 2'h0)
$display("\tFlash PROM read (%h)@(%h)",
memori_32[addr[23:2]], addr) ;
else
if (b_sel == 2'h1)
$display("\tFlash PROM read (%h)@(%h)",
memori_8[addr],addr) ;
end
always@(posedge we_l)
if (cs_l == 1'b0)
begin
if (b_sel == 2'h0)
begin
memori_32[addr[23:2]] = data ;
$display("\tFlash PROM write (%h)@(%h)",
data, addr) ;
end
else
if (b_sel == 2'h1)
begin
if ( flash_pm == 1'b1 )
begin
if ( ( setup_data == 1'b0 ) & ( write_done == 1'b0 ) )
begin
if ( data[7:0] == 'h40 )
begin
$display("\t\t ** 40 Hex data found on prom bus ** ");
setup_data = 1'b1 ;
end
else
$display("\t\t ** 40 Hex data NOT found on prom bus ** ");
end
else
if ( ( setup_data == 1'b1 ) & ( write_done == 1'b0 ) )
begin
memori_8[addr] = data[7:0] ;
$display("\tFlash PROM write (%h)@(%h)",
data[7:0], addr) ;
write_done = 1'b1 ;
end
else
if ( ( setup_data == 1'b1 ) & ( write_done == 1'b1 ) )
begin
if ( data[7:0] == 'hc0 )
begin
$display("\t\t ** C0 Hex data found on prom bus ** ");
setup_data = 1'b0 ;
write_done = 1'b0 ;
end
else
$display("\t\t ** C0 Hex data NOT found on prom bus ** ");
end
end
else
if ( flash_pm == 1'b0 )
begin
memori_8[addr] = data[7:0] ;
$display("\tFlash PROM write (%h)@(%h)",
data[7:0], addr) ;
end
end
end
initial
#40
begin
if (b_sel == 2'h0)
$readmemh("boot_rom.imag", memori_32) ;
else
if (b_sel == 2'h1)
$readmemh("boot_rom8.imag", memori_8) ;
end
endmodule
| This page: |
Created: | Thu Aug 19 12:00:30 1999 |
| From: |
../../../sparc_v8/system/rtl/flash_prom32.v
|