ic_state_str[1] = "Sw" ;	// STAT_WAIT
	ic_state_str[2] = "S " ;	// STAT
	ic_state_str[3] = "Nw" ;	// NC_WAIT
	ic_state_str[4] = "Nb" ;	// NC_BYP
	ic_state_str[5] = "Nr" ;	// NC_RETRY
	ic_state_str[6] = "Fw" ;	// FILL_WAIT
	ic_state_str[7] = "F " ;	// FILL_WRITE
	ic_state_str[8] = "D1" ;	// DEAD_CYC_1
	ic_state_str[9] = "D2" ;	// DEAD_CYC_2
	ic_state_str[10] = "D3" ;	// DEAD_CYC_3
	ic_state_str[11] = "Ti" ;	// TAG_INV
	ic_state_str[12] = "Tw" ;	// TAG_INV_WRITE
    end

/*
    task ic_st ;
	input [(`LOGDCCBYTES-1):0] bidx ;
	input [31:0] labellen ;
	reg [(`LOGDCCCYCLES-1):0] cidx ;
	reg [7:0] byte ;
	begin
	    Mccdisp.pspaces(Mccdisp.dcc_labellen-labellen) ;
	    cidx=Mccdisp.from ;
	    repeat(Mccdisp.ccdn) begin
		byte = Mccdisp.dccvec[{cidx,bidx}] ;
		if ((^byte)===1'bx) $write(" x ") ;
		else $write(" %s", ic_state_str[byte]) ;
		cidx= cidx+1 ;
	    end
	    $display;
	end
    endtask
*/

    // For signalscan displays:
    wire [15:0] ic_state_lbl =
	(^ic_state===1'bx) ? "x " : ic_state_str[ic_state_encoded] ;

    // synopsys translate_on

    // Misc bus drivers for ICache/ITag LdA.

    // Format the ITag fields for a LdA
    wire [31:0] it_lda_data = {
	it_dout_f[17:0], 2'b0, it_cntx_out[7:0],
        it_acc_out, it_lvl_out, it_val_f
    } ;
	
    wire [31:0] lda_data =
	ic_asi_load_cache_w ? ( dva_w_2 ? ic_ibus[31:0] : ic_ibus[63:32])
			    : it_lda_data[31:0] ;

    tri_regen_32 tsd(misc_out[31:0], lda_data[31:0], 
				ss_clock, mm_icdaten, ss_reset) ;


endmodule