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Signals index

K
 K : FJK1QA : input
Connects down to:CSL_FJK3_Q:M1:2 
 K : FJK1QC : input
Connects down to:CSL_FJK3_Q:M1:2 
 K : FJK1SQA : input
Connects down to:CSL_FJK3S_Q:M1:2 
 K : FJK1SQC : input
Connects down to:CSL_FJK3S_Q:M1:2 
 K : FJK2QA : input
Connects down to:CSL_FJK3_Q:M1:2 
 K : FJK2QC : input
Connects down to:CSL_FJK3_Q:M1:2 
 K : FJK2SQA : input
Connects down to:CSL_FJK3S_Q:M1:2 
 K : FJK2SQC : input
Connects down to:CSL_FJK3S_Q:M1:2 
 K : FJK3QA : input
Connects down to:CSL_FJK3_Q:M1:2 
 K : FJK3QC : input
Connects down to:CSL_FJK3_Q:M1:2 
 K : FJK3SQA : input
Connects down to:CSL_FJK3S_Q:M1:2 
 K : FJK3SQC : input
Connects down to:CSL_FJK3S_Q:M1:2 
 k : ME_OR11 : input
Connects down to:JNOR3A:u1:A3 
Connects up to:Exception:g10:BM 
 k : ME_OR12 : input
Connects down to:JNOR4B:u1:A3 
 k : pcimonitor_fm : integer
 keep_alt : Mpc_cntl : wire
Connects down to:Mflipflop_1:keep_alt_reg_1:out 
 killnum : Mclocks : reg
 kill_cti_in_e : Mpc_cntl : wire
 kill_fetch_fill : Mpc_cntl : wire
Connects down to:Mflipflop_1:kill_fetch_fill_reg_1:out 
 kill_help_d : Mpipec_br_vald : wire
 kill_ilock_br_fetch : Mpc_cntl : wire
Connects down to:Mflipflop_1:kill_ilock_br_fetch_reg_1:out 
 kill_jmp_ld : Mpc_cntl : wire
Connects down to:Mflipflop_1:kill_jmp_ld_reg_1:out 
 kill_nohelp_d : Mpipec_br_vald : wire
 kill_nohelp_d_il : Mpipec_help_ilock : wire
 known_ain_w : mc_dtag : wire
 known_ain_w : mc_itag : wire
L
 l : ME_OR12 : input
Connects down to:JNOR4B:u1:A4 
 L : Mfcc_eval : wire
 l0_lst_ : arbiter : reg
 l1_lst_ : arbiter : reg
 l2Last : arbiter : wire
 l2_lst_ : arbiter : reg
 laddress : pcislave_fm : integer
 lastbreak : Mclocks : reg
 lastcmd_back : pcimaster_fm : reg
 lastcmd_same : pcimaster_fm : reg
 last_ack64 : pcimonitor_fm : reg
 last_ad : pcimaster_fm : reg
 last_ad : pcimonitor_fm : reg
 last_ad : pcislave_fm : reg
 last_address : afx_slave_sm : wire
Connects down to:REG32:reg32_0:data_out 
 last_bstate : pcimaster_fm : integer
 last_bstate : pcislave_fm : integer
 last_bus_64 : pcimaster_fm : reg
 last_can_fold : Mpc_cntl : wire
Connects down to:Mflipflop_1:last_cf_reg_1:out 
 last_cbe : pcimaster_fm : reg
 last_cbe : pcimonitor_fm : reg
 last_cbe : pcislave_fm : reg
 last_clk_rising : pcimaster_fm : integer
 last_clk_type : misc_tasks : reg
 last_cmd : afx_slave_sm : wire
 last_cmd_3 : afx_slave_sm : reg
 last_cmd_reg : afx_slave_sm : wire
Connects down to:REG32:reg32_0:data_out 
 last_complete : Mtrace : reg
 last_cycle : pcimonitor_fm : reg
 last_cycle_command : pcimaster_fm : integer
 last_data : pcimaster_fm : reg
 last_devsel : pcimonitor_fm : reg
 last_dly : pcislave_fm : reg
 last_fill_write : rl_ic_cntl : wire
 last_force_dva : Mpc_cntl : wire
Connects down to:Mflipflop_1:last_force_dva_reg_1:out 
 last_frame : pcimonitor_fm : reg
 last_frame : pcislave_fm : reg
 last_frame_ : pci_add_mon : reg
 last_free_phase : rl_clk_cntl : wire
Connects down to:Mflipflop_rh:lfp_ff:out 
 last_free_phase_a1 : rl_clk_cntl : wire
Connects down to:Mflipflop_rh:lfp_ff:in 
 last_free_phase_pci : rl_clk_cntl : wire
Connects down to:Mflipflop_rh:lfppci_ff:out , Mflipflop_rh:pciclk_ff:in 
 last_free_phase_pci_in : rl_clk_cntl : wire
Connects down to:Mflipflop_rh:lp_ff:in , Mflipflop_rh:lfppci_ff:in 
 last_gen : Miuchip : wire
Connects down to:Mqueue:queue:last_gen , Mpc:pc:last_gen 
 last_gen : Mpc : output wire
Connects down to:Fincr_30:inc30_ilg:in , Mflipflop_30:last_gen_reg_30:out , Mflipflop_30:ll_gen_reg_30:din 
Connects up to:Miuchip:pc:last_gen 
 last_gen : Mqueue : input
Connects down to:Fincr_30:inc30_q:in 
Connects up to:Miuchip:queue:last_gen 
 last_gnt : pcimonitor_fm : reg
 last_idsel : pcimonitor_fm : reg
 last_irdy : pcimaster_fm : reg
 last_irdy : pcimonitor_fm : reg
 last_irdy : pcislave_fm : reg
 last_irdy_ : pci_add_mon : reg
 last_lock : pcimonitor_fm : reg
 last_master_ : arbiter : reg
 last_misp : Mpc_cntl : wire
Connects down to:Mflipflop_1:last_misp_reg_1:out 
 last_null_fetch : Mpc_cntl : wire
Connects down to:Mflipflop_1:last_null_fetch_reg_1:out 
 last_pack64nn : pcimaster_fm : reg
 last_par : pcislave_fm : reg
 last_par64 : pcislave_fm : reg
 last_perr : pcimonitor_fm : reg
 last_perr : pcislave_fm : reg
 last_phase : pcimonitor_fm : integer
 last_phase : rl_clk_cntl : wire
Connects down to:Mflipflop_rh:lp_ff:out 
 last_phase_1st_half : rl_clk_cntl : wire
Connects down to:Mflipflop_rh:scmode1_ff:enable_l , Mflipflop_rh:scmode_ff:enable_l , Mflipflop_rh:jtrst1_ff:enable_l , Mflipflop_rh:jtrst_ff:enable_l , Mflipflop_rh:rst1_ff:enable_l , Mflipflop_rh:rst_ff:enable_l , Mflipflop_rh:rs_dsbl_ff:enable_l , Mflipflop_rh:pdm_ff:enable_l 
 last_phase_2nd_half : rl_clk_cntl : wire
Connects down to:Mflipflop_rh_3:ip_reg:enable_l , Mflipflop_rh:sc_ff:enable_l 
 last_phase_pci_2nd_half : rl_clk_cntl : wire
 last_phi : clk_misc : output
Connects down to:misc:ssparc_misc:last_phi 
Connects up to:ssparc_chip:clk_misc:last_phi 
 last_phi : misc : output
Connects down to:rl_rst_cntl:rst_cntl:last_phi , rl_clk_stop:clk_stop:last_phi 
Connects up to:clk_misc:ssparc_misc:last_phi 
 last_phi : Mtask : wire
Connects down to:Mflipflop_rh:rst_rst:enable_l , Mflipflop_rh:rst_rst:reset_l 
 last_phi : rl_clk_stop : output
Connects down to:Mflipflop_s:lp_reg:out , Mflipflop_srh:sa0_ff:enable_l , Mflipflop_srh:sa1_ff:enable_l , Mflipflop_srh:sa2_ff:enable_l , Mflipflop_srh:sa3_ff:enable_l , Mflipflop_srh:sa4_ff:enable_l , Mflipflop_sr:int_ev_mc_ff:in , Mflipflop_srh:int_ev_ff:enable_l , Mflipflop_srh:sds_ff:enable_l , Mflipflop_srh_2:srq_reg:enable_l 
Connects up to:misc:clk_stop:last_phi 
 last_phi : rl_rst_cntl : input
Connects down to:Mflipflop_srh_4:rsm_reg:enable_l , Mflipflop_1:pci_rst_sync1:enable_l , Mflipflop_1:pci_rst_sync2:enable_l , Mflipflop_srh:wd_ff:enable_l 
Connects up to:misc:rst_cntl:last_phi 
 last_phi : ssparc_chip : wire
Connects down to:clk_misc:clk_misc:last_phi , ssparc_core:ssparc_core:last_phi 
 last_phi : ssparc_core : input
Connects up to:ssparc_chip:ssparc_core:last_phi 
 last_phi_a2 : rl_clk_stop : wire
Connects down to:Mflipflop_s:n2lp_reg:in 
 last_predict_taken : Mpc_cntl : wire
 last_req : pcimonitor_fm : reg
 last_req64 : pcimonitor_fm : reg
 last_sbo : pcimonitor_fm : reg
 last_sdone : pcimonitor_fm : reg
 last_serr : pcimonitor_fm : reg
 last_serr : pcislave_fm : reg
 last_single : abort_write_sm : input
Connects up to:afxmaster:aw_sm:last_single 
 last_single : afxmaster : wire
Connects down to:abort_write_sm:aw_sm:last_single 
 last_stop : pcimonitor_fm : reg
 last_st_w : m_mmu_cntl : wire
Connects down to:rl_mmu_lgc:mmu_lgc:last_st_w , rl_par_cntl:par_cntl:last_st_w , rl_asi_cntl:asi_cntl:last_st_w 
 last_st_w : rl_asi_cntl : input
Connects up to:m_mmu_cntl:asi_cntl:last_st_w 
 last_st_w : rl_mmu_lgc : output
Connects up to:m_mmu_cntl:mmu_lgc:last_st_w 
 last_st_w : rl_par_cntl : input
Connects up to:m_mmu_cntl:par_cntl:last_st_w 
 last_taken : Mpc_cntl : wire
Connects down to:Mflipflop_1:last_taken_reg_1:out 
 last_targ_adr : Mpc : wire
Connects down to:Mflipflop_30:lta_reg_30:out 
 last_transfer : pcimonitor_fm : reg
 last_trdy : pcimaster_fm : reg
 last_trdy : pcimonitor_fm : reg
 last_trdy : pcislave_fm : reg
 last_wb_entry : rl_mmu_lgc : wire
Connects down to:Mflipflop_r_1:last_wb_entry_ff_1:din 
 latched_bstate : pcimaster_fm : integer
 latched_comp : pcimaster_fm : reg
 latched_lock_a : pcimaster_fm : reg
 latchq : BSCN2 : wire
Connects down to:UDP_LATCH:update_latch:Q 
 latchq : BSCN4 : wire
Connects down to:UDP_LATCH:update_latch:Q 
 latchq0 : BSCN3 : wire
Connects down to:UDP_LATCH:update_latch0:Q 
 latchq1 : BSCN3 : wire
Connects down to:UDP_LATCH:update_latch1:Q 
 latency_timer_reg : pcimaster_fm : reg
 lbrs3_d_xl : Mir : wire
Connects down to:Mflipflop_8:lbrs3_d_xl_reg_8:out 
 LD : FD1SLQA : input
Connects down to:CSL_FD2SL:M1:4 
 LD : FD1SLQC : input
Connects down to:CSL_FD2SL:M1:4 
 LD : FD2LQA : input
 LD : FD2LQC : input
 LD : FD2SL2QA : input
Connects down to:CSL_FD2SL:M1:4 
 LD : FD2SL2QC : input
Connects down to:CSL_FD2SL:M1:4 
 ld : ME_FDS2LP : input
Connects up to:qcore_ctl:fq_unimp_0_ff:ld_fq_unimp , qcore_ctl:fq_unimp_1_ff:ld_fq_unimp , qcore_ctl:fq_unimp_2_ff:ld_fq_unimp , qcore_ctl:fpm_res_ff:fpm_result_ld , qcore_ctl:fq_start_0_ff:ld_fq_started , qcore_ctl:fq_start_1_ff:ld_fq_started , qcore_ctl:fq_start_2_ff:ld_fq_started , qcore_ctl:fq_type_0_ff:ld_fq_type , qcore_ctl:fq_type_1_ff:ld_fq_type , qcore_ctl:fq_type_2_ff:ld_fq_type , qcore_ctl:fq_rd_dbl_0_ff:ld_fq_rd_dbl , qcore_ctl:fq_rd_dbl_1_ff:ld_fq_rd_dbl , qcore_ctl:fq_rd_dbl_2_ff:ld_fq_rd_dbl , qcore_ctl:qne_0_ff:ld_qne , qcore_ctl:qne_1_ff:ld_qne , qcore_ctl:qne_2_ff:ld_qne , qcore_ctl:qne_val_0_ff:ld_qne_val , qcore_ctl:qne_val_1_ff:ld_qne_val , qcore_ctl:qne_val_2_ff:ld_qne_val , qcore_ctl:fmul_e_ff:ext_hold , fhold_ctl:ldreg_e_ff:ls_reg_ld , fhold_ctl:ldreg_w_ff:ls_reg_ld , fhold_ctl:finst_e_ff:no_holds , fhold_ctl:fop_e_ff:no_holds , fhold_ctl:rs1dbl_e_ff:no_holds , fhold_ctl:rs1used_e_ff:no_holds , fhold_ctl:rddbl_e_ff:no_holds , fhold_ctl:rdused_e_ff:no_holds , fhold_ctl:unimp_e_ff:no_holds , stat_ctl:finst_ff_e:ext_hold , stat_ctl:finst_ff_w:ext_hold , stat_ctl:noqne_ff:ext_hold , ME_FDS2LP2:f0:LD , ME_FDS2LP2:f1:LD , ME_FDS2LP3:f0:LD , ME_FDS2LP3:f1:LD , ME_FDS2LP3:f2:LD , ME_FDS2LP4:f0:LD , ME_FDS2LP4:f1:LD , ME_FDS2LP4:f2:LD , ME_FDS2LP4:f3:LD , ME_FDS2LP5:f0:LD , ME_FDS2LP5:f1:LD , ME_FDS2LP5:f2:LD , ME_FDS2LP5:f3:LD , ME_FDS2LP5:f4:LD , ME_FDS2LP8:f0:LD , ME_FDS2LP8:f1:LD , ME_FDS2LP8:f2:LD , ME_FDS2LP8:f3:LD , ME_FDS2LP8:f4:LD , ME_FDS2LP8:f5:LD , ME_FDS2LP8:f6:LD , ME_FDS2LP8:f7:LD , fpusas_sig:wfpop_ff:ext_hold , fpusas_sig:rfpop_ff:ext_hold , fpusas_sig:fpins_e_ff:ext_hold , fpusas_sig:fpins_w_ff:ext_hold , fpusas_sig:fpins_r_ff:ext_hold 
 LD : ME_FDS2LP2 : input
Connects down to:ME_FDS2LP:f0:ld , ME_FDS2LP:f1:ld 
Connects up to:stat_ctl:fcc_ff:fcc_en , stat_ctl:rd_ff:fsr_ld 
 LD : ME_FDS2LP3 : input
Connects down to:ME_FDS2LP:f0:ld , ME_FDS2LP:f1:ld , ME_FDS2LP:f2:ld 
Connects up to:rfrw_ctl:fpstmux_reg:no_holds , stat_ctl:ftt_ff:ftt_en 
 LD : ME_FDS2LP4 : input
Connects down to:ME_FDS2LP:f0:ld , ME_FDS2LP:f1:ld , ME_FDS2LP:f2:ld , ME_FDS2LP:f3:ld 
 LD : ME_FDS2LP5 : input
Connects down to:ME_FDS2LP:f0:ld , ME_FDS2LP:f1:ld , ME_FDS2LP:f2:ld , ME_FDS2LP:f3:ld , ME_FDS2LP:f4:ld 
Connects up to:fhold_ctl:rd_wreg:rd_reg_ld , fhold_ctl:ls_rreg:ls_reg_ld , stat_ctl:aexc_ff:aexc_en , stat_ctl:cexc_ff:cexc_en , stat_ctl:tem_ff:fsr_ld 
 LD : ME_FDS2LP8 : input
Connects down to:ME_FDS2LP:f0:ld , ME_FDS2LP:f1:ld , ME_FDS2LP:f2:ld , ME_FDS2LP:f3:ld , ME_FDS2LP:f4:ld , ME_FDS2LP:f5:ld , ME_FDS2LP:f6:ld , ME_FDS2LP:f7:ld 
Connects up to:fhold_ctl:ls_ereg:ls_reg_ld , fhold_ctl:ls_wreg:ls_reg_ld 
 lda_data : rl_ic_cntl : wire
Connects down to:tri_regen_32:tsd:in 
 lddf_w : rfrw_ctl : wire
 lddi_e : rl_dc_cntl : wire
Connects down to:MflipflopR:lddi_ff:in 
 lddi_r : herbulator : input
Connects up to:rl_dc_cntl:herbulator:lddi_r 
 lddi_r : rl_dc_cntl : wire
Connects down to:MflipflopR:hlddi_ff:out , herbulator:herbulator:lddi_r 
 lddi_w : rl_dc_cntl : wire
Connects down to:MflipflopR:lddi_ff:out , MflipflopR:hlddi_ff:in 
 ldd_e : rl_dc_cntl : wire
 ldd_first_read : rl_asi_cntl : wire
 ldd_ilock : Mpipec_help_ilock : wire
 ldd_w : m_mmu_cntl : wire
Connects down to:rl_marb_sm:marb_sm:ldd_w , rl_mmu_lgc:mmu_lgc:ldd_w , rl_mmu_regs:mmu_regs:ldd_w 
 ldd_w : rl_marb_sm : input
Connects up to:m_mmu_cntl:marb_sm:ldd_w 
 ldd_w : rl_mmu_lgc : output
Connects up to:m_mmu_cntl:mmu_lgc:ldd_w 
 ldd_w : rl_mmu_regs : input
Connects up to:m_mmu_cntl:mmu_regs:ldd_w 
 ldfsr_d : fhold_ctl : wire
 ldfsr_e : fhold_ctl : wire
 ldfsr_w : fhold_ctl : wire
 ldfsr_w : rfrw_ctl : wire
 ldf_d : fhold_ctl : wire
 ldf_e : fhold_ctl : wire
 ldf_w : fhold_ctl : output wire
Connects up to:fpc_ctl:fhold1:ldf_w 
 ldf_w : fpc_ctl : wire
Connects down to:fhold_ctl:fhold1:ldf_w , rfrw_ctl:rfrwctl1:ldf_w 
 ldf_w : rfrw_ctl : input
Connects up to:fpc_ctl:rfrwctl1:ldf_w 
 ldreg_e : fhold_ctl : wire
Connects down to:ME_FDS2LP:ldreg_w_ff:d 
 ldreg_e_nval : fhold_ctl : wire
Connects down to:ME_FDS2LP:ldreg_e_ff:q 
 ldreg_w : fhold_ctl : wire
Connects down to:ME_FDS2LP:ldreg_w_ff:q 
 ldsto_w : m_mmu_cntl : wire
Connects down to:rl_mmu_lgc:mmu_lgc:ldsto_w , rl_par_cntl:par_cntl:ldsto_w 
 ldsto_w : rl_mmu_lgc : output
Connects down to:Mflipflop_r_1:ldsto_x_ff_1:din 
Connects up to:m_mmu_cntl:mmu_lgc:ldsto_w 
 ldsto_w : rl_par_cntl : input
Connects up to:m_mmu_cntl:par_cntl:ldsto_w 
 ldsto_w_val : rl_mmu_lgc : wire
 ldsto_w_val_in : rl_mmu_lgc : wire
Connects down to:Mflipflop_r_1:ldsto_w_val_ff_1:din 
 ldsto_x : m_mmu_cntl : wire
Connects down to:rl_marb_sm:marb_sm:ldsto_x , rl_mmu_lgc:mmu_lgc:ldsto_x 
 ldsto_x : rl_marb_sm : input
Connects up to:m_mmu_cntl:marb_sm:ldsto_x 
 ldsto_x : rl_mmu_lgc : output wire
Connects down to:Mflipflop_r_1:ldsto_x_ff_1:out 
Connects up to:m_mmu_cntl:mmu_lgc:ldsto_x 
 ldsto_xlate_in : rl_mmu_lgc : wire
 ldst_block : m_mmu_cntl : wire
Connects down to:rl_marb_sm:marb_sm:ldst_block , rl_par_cntl:par_cntl:ldst_block 
 ldst_block : rl_marb_sm : output
Connects up to:m_mmu_cntl:marb_sm:ldst_block 
 ldst_block : rl_par_cntl : input
Connects up to:m_mmu_cntl:par_cntl:ldst_block 
 ldst_block_in : rl_marb_sm : wire
Connects down to:Mflipflop_r_1:ldst_block_ff_1:din 
 ldst_block_q : rl_marb_sm : wire
Connects down to:Mflipflop_r_1:ldst_block_ff_1:out 
 ldst_dbl_e : fhold_ctl : wire
 ldst_dbl_w : fhold_ctl : wire
 ldst_depend : fpc_ctl : wire
 ldst_depend_1 : fhold_ctl : wire
 ldst_depend_2 : fhold_ctl : wire
 ldst_st : m_mmu_cntl : wire
Connects down to:rl_marb_sm:marb_sm:ldst_st , rl_mmu_lgc:mmu_lgc:ldst_st , rl_par_cntl:par_cntl:ldst_st 
 ldst_st : rl_marb_sm : output wire
Connects down to:Mflipflop_r_1:ldst_st_ff_1:out 
Connects up to:m_mmu_cntl:marb_sm:ldst_st 
 ldst_st : rl_mmu_lgc : input
Connects up to:m_mmu_cntl:mmu_lgc:ldst_st 
 ldst_st : rl_par_cntl : input
Connects up to:m_mmu_cntl:par_cntl:ldst_st 
 ldst_st_in : rl_marb_sm : wire
Connects down to:Mflipflop_r_1:ldst_st_ff_1:din 
 ldtlb_data_tw : m_mmu_cntl : wire
Connects down to:rl_tw_sm:tw_sm:ldtlb_data_tw , rl_mmu_regs:mmu_regs:ldtlb_data_tw , rl_va_mux:va_muxl:tlb_data_we 
 ldtlb_data_tw : rl_mmu_regs : input
Connects up to:m_mmu_cntl:mmu_regs:ldtlb_data_tw 
 ldtlb_data_tw : rl_tw_sm : output
Connects up to:m_mmu_cntl:tw_sm:ldtlb_data_tw 
 ldtlb_tag_tw : m_mmu_cntl : wire
Connects down to:rl_tw_sm:tw_sm:ldtlb_tag_tw , rl_par_cntl:par_cntl:ldtlb_tag_tw , rl_va_mux:va_muxl:tlb_tag_we 
 ldtlb_tag_tw : rl_par_cntl : input
Connects up to:m_mmu_cntl:par_cntl:ldtlb_tag_tw 
 ldtlb_tag_tw : rl_tw_sm : output
Connects up to:m_mmu_cntl:tw_sm:ldtlb_tag_tw 
 ld_cas_about : afxmaster : wire
 ld_ct : rl_col_inc : input
Connects up to:rl_col_row_addr:col_incr:ld_ct , rl_col_row_addr:gaddr_incr:ld_ct 
 ld_ct : rl_col_row_addr : input
Connects down to:rl_col_inc:col_incr:ld_ct , rl_col_inc:gaddr_incr:ld_ct 
Connects up to:rl_mcb:cr_addr:mx_ld_ct 
 ld_ct : rl_mcb_lgc : output
Connects up to:rl_mcb:mcb_lgc:mx_ld_ct 
 ld_ct : state_count_1 : wire
 ld_ct_175 : state_count_1 : wire
 ld_ct_bus : state_count_1 : wire
 ld_ct_cas : state_count_1 : wire
 ld_ct_cbr : state_count_1 : wire
 ld_ct_dead_cyc_dr : p_reply_count : wire
 ld_ct_dead_cyc_gr : p_reply_count : wire
 ld_ct_dead_cyc_gw : p_reply_count : wire
 ld_ct_p_reply : p_reply_count : wire
 ld_ct_ras : state_count_1 : wire
 ld_ct_req_count : rl_reqgen : wire
 ld_ct_rmw : state_count_1 : wire
 ld_ct_timeout : timeout_count : wire
 ld_ct_wr5 : state_count_1 : wire
 ld_ct_wr6 : state_count_1 : wire
 ld_dep_e_fq : fhold_ctl : wire
 ld_dep_e_q0 : fhold_ctl : wire
 ld_dep_e_q1 : fhold_ctl : wire
 ld_dep_e_q2 : fhold_ctl : wire
 ld_dep_w_fq : fhold_ctl : wire
 ld_dep_w_q0 : fhold_ctl : wire
 ld_dep_w_q1 : fhold_ctl : wire
 ld_dep_w_q2 : fhold_ctl : wire
 ld_fpu : herbulator : output
Connects up to:rl_dc_cntl:herbulator:ld_fpu 
 ld_fpu : rl_cc : output
Connects down to:rl_dc_cntl:dc_cntl:ld_fpu 
Connects up to:ssparc_core:cc:ld_fpu_w 
 ld_fpu : rl_dc_cntl : output
Connects down to:herbulator:herbulator:ld_fpu 
Connects up to:rl_cc:dc_cntl:ld_fpu 
 ld_fpu_w : fpufpc : input
Connects down to:fp_fpm:fpfpm:ld_fpu_w 
Connects up to:ssparc_core:ssparc_fpu:ld_fpu_w 
 ld_fpu_w : fp_fpm : input
Connects down to:fp_rw:fprw:ld_fpu_w 
Connects up to:fpufpc:fpfpm:ld_fpu_w 
 ld_fpu_w : fp_rw : input
Connects down to:ME_MUX21H32:rfinmux1:B , ME_MUX21H32:rfinmux0:B 
Connects up to:fp_fpm:fprw:ld_fpu_w 
 ld_fpu_w : ssparc_core : wire
Connects down to:fpufpc:ssparc_fpu:ld_fpu_w , rl_cc:cc:ld_fpu 
 ld_fq_rd_dbl : qcore_ctl : wire
Connects down to:ME_FDS2LP:fq_rd_dbl_0_ff:ld , ME_FDS2LP:fq_rd_dbl_1_ff:ld , ME_FDS2LP:fq_rd_dbl_2_ff:ld 
 ld_fq_started : qcore_ctl : wire
Connects down to:ME_FDS2LP:fq_start_0_ff:ld , ME_FDS2LP:fq_start_1_ff:ld , ME_FDS2LP:fq_start_2_ff:ld 
 ld_fq_started_l : qcore_ctl : wire
Connects down to:ME_O2A1:iu_hold_gate_18:z , ME_O2A1:iu_hold_gate_19:z , ME_O2A1:iu_hold_gate_20:z 
 ld_fq_type : qcore_ctl : wire
Connects down to:ME_FDS2LP:fq_type_0_ff:ld , ME_FDS2LP:fq_type_1_ff:ld , ME_FDS2LP:fq_type_2_ff:ld 
 ld_fq_type_0_l : qcore_ctl : wire
Connects down to:ME_O2A1:iu_hold_gate_21:z 
 ld_fq_unimp : qcore_ctl : wire
Connects down to:ME_FDS2LP:fq_unimp_0_ff:ld , ME_FDS2LP:fq_unimp_1_ff:ld , ME_FDS2LP:fq_unimp_2_ff:ld 
 ld_ir_e : fp_qst : wire
Connects down to:ME_FREGA_1_25:ir_reg_e:enable 
 ld_iu : herbulator : output
Connects up to:rl_dc_cntl:herbulator:ld_iu 
 ld_iu : Mexec : input
Connects up to:Miuchip:exec:ld_iu 
 ld_iu : Miu : input
Connects down to:Miuchip:iuchip:ld_iu 
Connects up to:ssparc_core:iu:ld_iu 
 ld_iu : Miuchip : input
Connects down to:Mregfile:regfile:ld_iu , Mexec:exec:ld_iu 
Connects up to:Miu:iuchip:ld_iu 
 ld_iu : Mregfile : input
Connects up to:Miuchip:regfile:ld_iu 
 ld_iu : rl_cc : output
Connects down to:rl_dc_cntl:dc_cntl:ld_iu 
Connects up to:ssparc_core:cc:ld_iu 
 ld_iu : rl_dc_cntl : output
Connects down to:herbulator:herbulator:ld_iu 
Connects up to:rl_cc:dc_cntl:ld_iu 
 ld_iu : ssparc_core : wire
Connects down to:Miu:iu:ld_iu , rl_cc:cc:ld_iu 
 ld_iu_w : herbulator : wire
Connects down to:Mflipflop_32:iu_odd_reg:din 
 ld_mreq_tw : m_mmu_cntl : wire
Connects down to:rl_mmu_lgc:mmu_lgc:ld_mreq_tw , rl_tw_sm:tw_sm:ld_mreq_tw 
 ld_mreq_tw : rl_mmu_lgc : input
Connects up to:m_mmu_cntl:mmu_lgc:ld_mreq_tw 
 ld_mreq_tw : rl_tw_sm : output
Connects up to:m_mmu_cntl:tw_sm:ld_mreq_tw 
 ld_op_d : Mdcache_control : output wire
Connects up to:Mdecode:dcache_control:ld_op_d 
 ld_op_d : Mdecode : output
Connects down to:Mdcache_control:dcache_control:ld_op_d 
Connects up to:Miuchip:decode:ld_op_d 
 ld_op_d : Miu : output
Connects down to:Miuchip:iuchip:ld_op_d 
Connects up to:ssparc_core:iu:ld_op_d 
 ld_op_d : Miuchip : output
Connects down to:Mdecode:decode:ld_op_d 
Connects up to:Miu:iuchip:ld_op_d 
 ld_op_d : rl_cc : input
Connects down to:rl_dc_cntl:dc_cntl:ld_op_d 
Connects up to:ssparc_core:cc:ld_op_d 
 ld_op_d : rl_dc_cntl : input
Connects down to:MflipflopR:ld_op_e_for_hold_ff:in 
Connects up to:rl_cc:dc_cntl:ld_op_d 
 ld_op_d : ssparc_core : wire
Connects down to:Miu:iu:ld_op_d , rl_cc:cc:ld_op_d 
 ld_op_d_op : Mdcache_control : wire
Connects down to:Mflipflop_1:ld_op_e_op_reg_1:din 
 ld_op_e : Mdcache_control : output wire
Connects up to:Mdecode:dcache_control:ld_op_e 
 ld_op_e : Mdecode : output
Connects down to:Mdcache_control:dcache_control:ld_op_e 
Connects up to:Miuchip:decode:ld_op_e 
 ld_op_e : Miu : output
Connects down to:Miuchip:iuchip:ld_op_e 
Connects up to:ssparc_core:iu:ld_op_e 
 ld_op_e : Miuchip : output
Connects down to:Mdecode:decode:ld_op_e 
Connects up to:Miu:iuchip:ld_op_e 
 ld_op_e : mmu : input
Connects down to:m_mmu_cntl:MMU_cntl:ld_op_e 
Connects up to:ssparc_core:ssparc_mmu:ld_op_e_mmu 
 ld_op_e : m_mmu_cntl : input
Connects down to:rl_mmu_lgc:mmu_lgc:ld_op_e , rl_par_cntl:par_cntl:ld_op_e 
Connects up to:mmu:MMU_cntl:ld_op_e 
 ld_op_e : rl_cc : input
Connects down to:rl_dc_cntl:dc_cntl:ld_op_e 
Connects up to:ssparc_core:cc:ld_op_e 
 ld_op_e : rl_dc_cntl : input
Connects down to:MflipflopR:ld_op_w_ff:in , Mflipflop_r:dc_asi_load_tag_w1_ff:in 
Connects up to:rl_cc:dc_cntl:ld_op_e 
 ld_op_e : rl_mmu_lgc : input
Connects up to:m_mmu_cntl:mmu_lgc:ld_op_e 
 ld_op_e : rl_par_cntl : input
Connects up to:m_mmu_cntl:par_cntl:ld_op_e 
 ld_op_e : ssparc_core : wire
Connects down to:Miu:iu:ld_op_e , rl_cc:cc:ld_op_e 
 ld_op_e_for_hold : rl_dc_cntl : wire
Connects down to:MflipflopR:ld_op_e_for_hold_ff:out 
 ld_op_e_mmu : Mdcache_control : output wire
Connects up to:Mdecode:dcache_control:ld_op_e_mmu 
 ld_op_e_mmu : Mdecode : output
Connects down to:Mdcache_control:dcache_control:ld_op_e_mmu 
Connects up to:Miuchip:decode:ld_op_e_mmu 
 ld_op_e_mmu : Miu : output
Connects down to:Miuchip:iuchip:ld_op_e_mmu 
Connects up to:ssparc_core:iu:ld_op_e_mmu 
 ld_op_e_mmu : Miuchip : output
Connects down to:Mdecode:decode:ld_op_e_mmu 
Connects up to:Miu:iuchip:ld_op_e_mmu 
 ld_op_e_mmu : ssparc_core : wire
Connects down to:Miu:iu:ld_op_e_mmu , mmu:ssparc_mmu:ld_op_e 
 ld_op_e_op : Mdcache_control : wire
Connects down to:Mflipflop_1:ld_op_e_op_reg_1:out 
 ld_op_w : dwait : input
Connects up to:rl_dc_cntl:dwait:ld_op_w 
 ld_op_w : rl_dc_cntl : wire
Connects down to:MflipflopR:ld_op_w_ff:out , Mflipflop_r:ld_op_in_trap_ff:in , Mflipflop_r:hold_after_last_stream_ff:in , dwait:dwait:ld_op_w , Mflipflop:dcc_st_miss_ff:in 
 ld_par : m_mmu_cntl : wire
Connects down to:rl_mmu_lgc:mmu_lgc:ld_par , rl_par_cntl:par_cntl:ld_par 
 ld_par : rl_mmu_lgc : input
Connects down to:Mflipflop_r_1:ld_par_ff_1:din , MflipflopR_2:size_sb_reg_2:enable_l 
Connects up to:m_mmu_cntl:mmu_lgc:ld_par 
 ld_par : rl_par_cntl : output
Connects up to:m_mmu_cntl:par_cntl:ld_par 
 ld_par_tw : m_mmu_cntl : wire
Connects down to:rl_tw_sm:tw_sm:ld_par_tw , rl_par_cntl:par_cntl:ld_par_tw 
 ld_par_tw : rl_par_cntl : input
Connects up to:m_mmu_cntl:par_cntl:ld_par_tw 
 ld_par_tw : rl_tw_sm : output
Connects up to:m_mmu_cntl:tw_sm:ld_par_tw 
 ld_pcntr_a : dp_mmu : input
Connects up to:mmu:MMU_dp:ld_pcntr_a 
 ld_pcntr_a : mmu : wire
Connects down to:m_mmu_cntl:MMU_cntl:ld_pcntr_a , dp_mmu:MMU_dp:ld_pcntr_a 
 ld_pcntr_a : m_mmu_cntl : output
Connects down to:rl_mmu_regs:mmu_regs:ld_pcntr_a 
Connects up to:mmu:MMU_cntl:ld_pcntr_a 
 ld_pcntr_a : rl_mmu_regs : output
Connects up to:m_mmu_cntl:mmu_regs:ld_pcntr_a 
 ld_pcntr_b : dp_mmu : input
Connects up to:mmu:MMU_dp:ld_pcntr_b 
 ld_pcntr_b : mmu : wire
Connects down to:m_mmu_cntl:MMU_cntl:ld_pcntr_b , dp_mmu:MMU_dp:ld_pcntr_b 
 ld_pcntr_b : m_mmu_cntl : output
Connects down to:rl_mmu_regs:mmu_regs:ld_pcntr_b 
Connects up to:mmu:MMU_cntl:ld_pcntr_b 
 ld_pcntr_b : rl_mmu_regs : output
Connects up to:m_mmu_cntl:mmu_regs:ld_pcntr_b 
 ld_qne : qcore_ctl : wire
Connects down to:ME_FDS2LP:qne_0_ff:ld , ME_FDS2LP:qne_1_ff:ld , ME_FDS2LP:qne_2_ff:ld 
 ld_qne_val : qcore_ctl : wire
Connects down to:ME_FDS2LP:qne_val_0_ff:ld , ME_FDS2LP:qne_val_1_ff:ld , ME_FDS2LP:qne_val_2_ff:ld 
 ld_qne_val_l : qcore_ctl : wire
Connects down to:ME_O2A1:iu_hold_gate_28:z 
 ld_ras_about : afxmaster : wire
 ld_sfsr : rl_mmu_regs : wire
 LeftnotRight : fp_frac : input
Connects down to:ME_NMUX_2B_58:Smux:A 
Connects up to:fpufpc:fpfrac:RomOutputs_18 
 leftpads_po_out : iopads : wire
Connects down to:leftpads:leftpads:po_out , botpads:botpads:pi_in 
 leftpads_scan_out : iopads : wire
Connects down to:leftpads:leftpads:scan_out , botpads:botpads:scan_in 
 LenFromnotLen : LengthLogic : wire
Connects down to:ME_AND2:rmg3:z , ME_OR3:ell:b 
 lev1_0 : parity_tree : wire
Connects down to:JXOR3B:LEVEL1_U0:O , JXOR3B:LEVEL2_U0:A1 
 lev1_1 : parity_tree : wire
Connects down to:JXOR3B:LEVEL1_U1:O , JXOR3B:LEVEL2_U0:A2 
 lev1_10 : parity_tree : wire
Connects down to:JXOR3B:LEVEL1_U10:O , JXOR3B:LEVEL2_U3:A2 
 lev1_2 : parity_tree : wire
Connects down to:JXOR3B:LEVEL1_U2:O , JXOR3B:LEVEL2_U0:A3 
 lev1_3 : parity_tree : wire
Connects down to:JXOR3B:LEVEL1_U3:O , JXOR3B:LEVEL2_U1:A1 
 lev1_4 : parity_tree : wire
Connects down to:JXOR3B:LEVEL1_U4:O , JXOR3B:LEVEL2_U1:A2 
 lev1_5 : parity_tree : wire
Connects down to:JXOR3B:LEVEL1_U5:O , JXOR3B:LEVEL2_U1:A3 
 lev1_6 : parity_tree : wire
Connects down to:JXOR3B:LEVEL1_U6:O , JXOR3B:LEVEL2_U2:A1 
 lev1_7 : parity_tree : wire
Connects down to:JXOR3B:LEVEL1_U7:O , JXOR3B:LEVEL2_U2:A2 
 lev1_8 : parity_tree : wire
Connects down to:JXOR3B:LEVEL1_U8:O , JXOR3B:LEVEL2_U2:A3 
 lev1_9 : parity_tree : wire
Connects down to:JXOR3B:LEVEL1_U9:O , JXOR3B:LEVEL2_U3:A1 
 lev2_0 : parity_tree : wire
Connects down to:JXOR3B:LEVEL2_U0:O , JXOR2B:LEVEL3_U0:A1 
 lev2_1 : parity_tree : wire
Connects down to:JXOR3B:LEVEL2_U1:O , JXOR2B:LEVEL3_U0:A2 
 lev2_2 : parity_tree : wire
Connects down to:JXOR3B:LEVEL2_U2:O , JXOR2B:LEVEL3_U2:A1 
 lev2_3 : parity_tree : wire
Connects down to:JXOR3B:LEVEL2_U3:O , JXOR2B:LEVEL3_U2:A2 
 lev3_0 : parity_tree : wire
Connects down to:JXOR2B:LEVEL3_U0:O , JXOR2B:LEVEL4_U0:A1 
 lev3_1 : parity_tree : wire
Connects down to:JXOR2B:LEVEL3_U2:O , JXOR2B:LEVEL4_U0:A2 
 lev4 : parity_tree : wire
Connects down to:JXOR2B:LEVEL4_U0:O , JNAND2B:LEVEL5_U0:A2 
 level : PRIORITY : reg
 LIB : fpufpc : wire
Connects down to:fp_ctl:fpctl:LIB , fp_frac:fpfrac:LIB 
 LIB : fp_ctl : output
Connects down to:frac_ctl:fracctl:LIB 
Connects up to:fpufpc:fpctl:LIB 
 LIB : fp_frac : input
Connects down to:ShiftLeft:shl:LIB 
Connects up to:fpufpc:fpfrac:LIB 
 LIB : frac_ctl : output
Connects down to:ShiftLeftCtl:slc:LIB 
Connects up to:fp_ctl:fracctl:LIB 
 LIB : ShiftLeft : input
Connects down to:ME_NMUX_2B_58:g23:D1 
Connects up to:fp_frac:shl:LIB 
 LIB : ShiftLeftCtl : output
Connects down to:ME_MUX2B:g20:z , ME_MUX2B:g21:z , ME_MUX2B:g22:z 
Connects up to:frac_ctl:slc:LIB 
 line_size : pcislave_fm : integer
 line_width : Mccdisp : integer
 little_0_out : writebuffer : wire
Connects down to:Mflipflop_1:write_buffer_0:out , Mflipflop_mux2_h_1:write_buffer_1:in1 
 little_1_out : writebuffer : wire
Connects down to:Mflipflop_mux2_h_1:write_buffer_1:out , Mflipflop_mux2_h_1:write_buffer_2:in1 
 little_2_out : writebuffer : wire
Connects down to:Mflipflop_mux2_h_1:write_buffer_2:out , Mflipflop_mux2_h_1:write_buffer_3:in1 
 little_3_out : writebuffer : wire
Connects down to:Mflipflop_mux2_h_1:write_buffer_3:out 
 little_endian : f_afx_slave : input
Connects down to:write_data:write_data:little_endian , read_data:read_data:little_endian 
Connects up to:pcic:f_afx_slave:little_endian 
 little_endian : herbulator : input
Connects up to:rl_dc_cntl:herbulator:little_endian 
 little_endian : Mexec : output
Connects down to:Mpsr:psr_mod:little_endian 
Connects up to:Miuchip:exec:little_endian 
 little_endian : Miu : output
Connects down to:Miuchip:iuchip:little_endian 
Connects up to:ssparc_core:iu:little_endian 
 little_endian : Miuchip : output
Connects down to:Mexec:exec:little_endian 
Connects up to:Miu:iuchip:little_endian 
 little_endian : Mpsr : output
Connects up to:Mexec:psr_mod:little_endian 
 little_endian : pcic : input
Connects down to:f_afx_slave:f_afx_slave:little_endian 
Connects up to:ssparc_core:ssparc_pcic:little_endian 
 little_endian : read_data : input
Connects up to:f_afx_slave:read_data:little_endian 
 little_endian : rl_cc : input
Connects down to:rl_dc_cntl:dc_cntl:little_endian 
Connects up to:ssparc_core:cc:little_endian 
 little_endian : rl_dc_cntl : input
Connects down to:herbulator:herbulator:little_endian , store_aligner:store_aligner:little_endian , writebuffer:writebuffer:little_endian 
Connects up to:rl_cc:dc_cntl:little_endian 
 little_endian : ssparc_core : wire
Connects down to:Miu:iu:little_endian , pcic:ssparc_pcic:little_endian , rl_cc:cc:little_endian 
 little_endian : store_aligner : input
Connects up to:rl_dc_cntl:store_aligner:little_endian 
 little_endian : writebuffer : input
Connects down to:Mflipflop_1:write_buffer_0:din , Mflipflop_mux2_h_1:write_buffer_1:in0 , Mflipflop_mux2_h_1:write_buffer_2:in0 , Mflipflop_mux2_h_1:write_buffer_3:in0 
Connects up to:rl_dc_cntl:writebuffer:little_endian 
 little_endian : write_data : input
Connects up to:f_afx_slave:write_data:little_endian 
 ll_gen : Mpc : wire
Connects down to:Fincr_30:inc30_illg:in , Mflipflop_30:ll_gen_reg_30:out 
 lmc_gnt_ : Msystem : wire
Connects down to:pcimaster:lmc_master1:pgntnn 
 lmc_mst : Msystem : reg
 lmc_req_ : Msystem : wire
Connects down to:pcimaster:lmc_master1:preqnn 
 LO : H0261AA : output
 LO : stat_ctl : wire
Connects down to:ME_TIEOFF:toff:GND , ME_INVA:g5:a 
 load : sign : input
Connects down to:ME_FD1E:signX2Reg:te 
Connects up to:fpm_frac:signLogic:passX2 
 loaded_lastcyc : Mpc_cntl : wire
Connects down to:Mflipflop_1:llastc_reg_1:out 
 LoadEn : AregLoadCtl : wire
Connects down to:ME_OR4:alcne:z , ME_AND2:alcni:a 
 LoadEn : BregLoadCtl : wire
Connects down to:ME_OR4:alcne:z , ME_AND2:alcni:a 
 LoadEn : ExpRegLoadCtl : wire
Connects down to:ME_OR3:alcne:z , ME_NAND2:en0:a 
 LoadForInt : frac_ctl : input
Connects down to:ShiftLeftCtl:slc:LoadForInt , ShiftRightCtl:src:LoadForInt 
Connects up to:fp_ctl:fracctl:RomOutputs 
 LoadForInt : ShiftLeftCtl : input
Connects down to:ME_MUX2B:g20:s , ME_MUX2B:g21:s , ME_MUX2B:g22:s 
Connects up to:frac_ctl:slc:LoadForInt 
 LoadForInt : ShiftRightCtl : input
Connects down to:ME_MUX_2B_9:g69:A 
Connects up to:frac_ctl:src:LoadForInt 
 LoadFromMult : AregLoadCtl : output
Connects down to:ME_AND3:alcnf:z 
Connects up to:frac_ctl:falc:LoadFromMult 
 LoadFromMult : BregLoadCtl : input
Connects down to:ME_AND2:alcn3:a , ME_OR4:alcne:c 
Connects up to:frac_ctl:fblc:LoadFromMult 
 LoadFromMult : frac_ctl : wire
Connects down to:BregLoadCtl:fblc:LoadFromMult , AregLoadCtl:falc:LoadFromMult 
 LoadOprs : AregLoadCtl : input
Connects down to:ME_INVA:iopl:a , ME_OR4:alcne:d 
Connects up to:frac_ctl:falc:LoadOprs 
 LoadOprs : BregLoadCtl : input
Connects down to:ME_INVA:iopl:a , ME_OR4:alcne:d 
Connects up to:frac_ctl:fblc:LoadOprs 
 LoadOprs : ExpRegLoadCtl : input
Connects down to:ME_INVA:iopl:a , ME_OR3:alcne:c 
Connects up to:exp_ctl:alc:LoadOprs , exp_ctl:blc:LoadOprs 
 LoadOprs : exp_ctl : input
Connects down to:ExpRegLoadCtl:alc:LoadOprs , ExpRegLoadCtl:blc:LoadOprs 
Connects up to:fp_ctl:expctl:FpLd 
 LoadOprs : frac_ctl : input
Connects down to:BregLoadCtl:fblc:LoadOprs , AregLoadCtl:falc:LoadOprs 
Connects up to:fp_ctl:fracctl:FpLd 
 LoadOprs : RoundModeLogic : input
Connects down to:ME_OR2_B:fgfo:b 
Connects up to:SignDp:rml:FpLd 
 LoadOprs : SignLogic : input
Connects down to:ME_OR4:ggdf:d , ME_NMUX2B:saxp:s , ME_OR2:gbdf:b , ME_NMUX2B:sbxp:s 
Connects up to:SignDp:sl:FpLd 
 load_addr_fifo : addr_reg : output wire
Connects up to:f_afx_slave:addr_reg:load_addr_fifo 
 load_addr_fifo : afx_slave_fifo : input
Connects down to:fifo4_next_29:address_fifo:write 
Connects up to:f_afx_slave:afx_slave_fifo:load_addr_fifo 
 load_addr_fifo : f_afx_slave : wire
Connects down to:addr_reg:addr_reg:load_addr_fifo , afx_slave_fifo:afx_slave_fifo:load_addr_fifo 
 load_afx_read_data : afx_slave_sm : wire
 load_afx_read_data : read_data : wire
Connects down to:REG64:reg0:load_en 
 load_afx_read_data_hi : afx_slave_sm : output wire
Connects up to:f_afx_slave:afx_slave_sm:load_afx_read_data_hi 
 load_afx_read_data_hi : f_afx_slave : wire
Connects down to:read_data:read_data:load_afx_read_data_hi , afx_slave_sm:afx_slave_sm:load_afx_read_data_hi 
 load_afx_read_data_hi : read_data : input
Connects up to:f_afx_slave:read_data:load_afx_read_data_hi 
 load_afx_read_data_lo : afx_slave_sm : output wire
Connects up to:f_afx_slave:afx_slave_sm:load_afx_read_data_lo 
 load_afx_read_data_lo : f_afx_slave : wire
Connects down to:read_data:read_data:load_afx_read_data_lo , afx_slave_sm:afx_slave_sm:load_afx_read_data_lo 
 load_afx_read_data_lo : read_data : input
Connects up to:f_afx_slave:read_data:load_afx_read_data_lo 
 load_bm_fifo : addr_reg : output wire
Connects up to:f_afx_slave:addr_reg:load_bm_fifo 
 load_bm_fifo : afx_slave_fifo : input
Connects down to:fifo4_4:bm_fifo:write 
Connects up to:f_afx_slave:afx_slave_fifo:load_bm_fifo 
 load_bm_fifo : f_afx_slave : wire
Connects down to:addr_reg:addr_reg:load_bm_fifo , afx_slave_fifo:afx_slave_fifo:load_bm_fifo 
 load_cc : Mcc : input
Connects up to:Mpsr:cc_mod:load_cc 
 load_cc : Mcomplete : wire
 load_cc : Mdecode : output
Connects down to:Mspecial_reg_control:special_reg_control:load_cc 
Connects up to:Miuchip:decode:load_cc 
 load_cc : Mexec : input
Connects down to:Mpsr:psr_mod:load_cc 
Connects up to:Miuchip:exec:load_cc 
 load_cc : Micceval : input
Connects up to:Mdecode:icceval:setcc , Mdecode:icceval_fold:setcc 
 load_cc : Miuchip : wire
Connects down to:Mdecode:decode:load_cc , Mexec:exec:load_cc 
 load_cc : Mpsr : input
Connects down to:Mcc:cc_mod:load_cc 
Connects up to:Mexec:psr_mod:load_cc 
 load_cc : Mspecial_reg_control : output wire
Connects up to:Mdecode:special_reg_control:load_cc 
 load_cmd_fifo : addr_reg : output wire
Connects up to:f_afx_slave:addr_reg:load_cmd_fifo 
 load_cmd_fifo : afx_slave_fifo : input
Connects down to:fifo4_next_4:cmd_fifo:write 
Connects up to:f_afx_slave:afx_slave_fifo:load_cmd_fifo 
 load_cmd_fifo : f_afx_slave : wire
Connects down to:addr_reg:addr_reg:load_cmd_fifo , afx_slave_fifo:afx_slave_fifo:load_cmd_fifo 
 load_config_add : afx_slave_sm : output wire
Connects up to:f_afx_slave:afx_slave_sm:load_config_add 
 load_config_add : config_addr : input
Connects up to:f_afx_slave:config_addr:load_config_add 
 load_config_add : f_afx_slave : wire
Connects down to:afx_slave_sm:afx_slave_sm:load_config_add , config_addr:config_addr:load_config_add 
 load_data_fifo : afx_slave_fifo : input
Connects down to:fifo4_64:data_fifo:write 
Connects up to:f_afx_slave:afx_slave_fifo:load_data_fifo 
 load_data_fifo : f_afx_slave : wire
Connects down to:write_data:write_data:load_data_fifo , afx_slave_fifo:afx_slave_fifo:load_data_fifo 
 load_data_fifo : write_data : output reg
Connects up to:f_afx_slave:write_data:load_data_fifo 
 load_en : REG29 : input
Connects up to:fifo4_next_29:REG0:load_reg0 , fifo4_next_29:REG1:load_reg1 , fifo4_next_29:REG2:load_reg2 , fifo4_next_29:REG3:load_reg3 
 load_en : REG32 : input
Connects up to:afx_slave_sm:reg32_0:read_afx_fifo 
 load_en : REG36 : input
Connects up to:interrupts:HLDREG:afx_mast_error 
 load_en : REG37 : input
 load_en : REG44 : input
Connects up to:afx_slave_sm:reg44_0:pci_start 
 load_en : REG64 : input
Connects up to:write_data:reg0:load_en , fifo4_64:REG64_0:write_reg0 , fifo4_64:REG64_1:write_reg1 , fifo4_64:REG64_2:write_reg2 , fifo4_64:REG64_3:write_reg3 , read_data:reg0:load_afx_read_data 
 load_en : write_data : wire
Connects down to:REG64:reg0:load_en 
 load_ilock : Mpipec_help_ilock : wire
 load_in_trap_w_d1 : rl_dc_cntl : wire
Connects down to:Mflipflop_r:ld_op_in_trap_ff:out 
 load_l : ME_FD1E : wire
Connects down to:Mflipflop:dff:enable_l 
 load_l : ME_FD1E_B : wire
Connects down to:Mflipflop:dff:enable_l 
 load_l : ME_FDS2LP : wire
Connects down to:Mflipflop_rh:dff:enable_l 
 load_mem_addr : pcimaster_fm : integer
 load_mem_addr : pcislave_fm : integer
 load_q : Mpc_cntl : wire
Connects down to:Mflipflop_1:pload_q_reg_1:din , Mflipflop_1:llastc_reg_1:din 
 load_reg0 : fifo4_next_29 : wire
Connects down to:REG29:REG0:load_en 
 load_reg1 : fifo4_next_29 : wire
Connects down to:REG29:REG1:load_en 
 load_reg2 : fifo4_next_29 : wire
Connects down to:REG29:REG2:load_en 
 load_reg3 : fifo4_next_29 : wire
Connects down to:REG29:REG3:load_en 
 local_blk : Mrf_xlate : wire
 local_debug_level : pcimaster : integer
 lock : pcimaster_fm : reg
 locknn : pcimonitor : input
Connects down to:pcimonitor_fm:fm:locknn 
 locknn : pcimonitor_fm : input
Connects up to:pcimonitor:fm:locknn 
 locknn : pcimonitor_fm_cntrl : reg
 locknn : pcimonitor_fm_input : reg
 locknn_event : pcimonitor_fm_input : reg
 locknn_event_time : pcimonitor_fm_input : integer
 locknn_last_event : pcimonitor_fm_input : integer
 locknn_old : pcimonitor_fm_input : reg
 lock_ : Msystem : wire
Connects down to:Pci_target:pciS:lock_ , PciMaster:pciM:lock_ , MASTER:pciM1:lock_ , MASTER:pciM2:lock_ , MASTER:pciM3:lock_ , checker:check:lock_ , checker:check:req64_ , checker:check:ack64_ 
 lock_ : pci_add_mon : wire
 lock_a : pcimaster_fm : reg
 lock_data_transferred : pcimaster_fm : reg
 lock_en : pcimaster_fm : reg
 lock_int : pcimaster_fm : reg
 lock_int : pcislave_fm : reg
 lock_owner : pcimonitor_fm : integer
 lock_state : pcimonitor_fm : integer
 lock_val : pcimaster_fm : reg
 lofreq_clk_rst : Mtask : reg
 logic_0 : bypass : input
Connects up to:rl_jtag_cntl:byp:logic_0 
 logic_0 : ccr : input
Connects up to:rl_jtag_cntl:clkc:logic_0 
 logic_0 : clk_misc : output
Connects down to:misc:ssparc_misc:logic_0 , rl_clk_cntl:clk_cntl:logic_0 , rl_jtag_cntl:jtag_cntl:spare_ccr , rl_jtag_cntl:jtag_cntl:logic_0 
Connects up to:ssparc_chip:clk_misc:logic_0 
 logic_0 : idreg : input
Connects up to:rl_jtag_cntl:idr:logic_0 
 logic_0 : ir : input
Connects up to:rl_jtag_cntl:inreg:logic_0 
 logic_0 : mc_dcache : wire
 logic_0 : mc_icache : wire
 logic_0 : Mflipflop : wire
Connects down to:ASFFHA:dff:SM , ASFFHA:dff:SI 
 logic_0 : MflipflopR : wire
Connects down to:ASFFRHA:dff:SM , ASFFRHA:dff:SI 
 logic_0 : misc : output
Connects down to:rl_clk_stop:clk_stop:logic_0 
Connects up to:clk_misc:ssparc_misc:logic_0 
 logic_0 : mr_caches : input
Connects down to:mc_i_tag_cache:i_tag_cache:it_acc_in , mc_i_tag_cache:i_tag_cache:it_acc_in , mc_i_tag_cache:i_tag_cache:it_at 
Connects up to:ssparc_core:caches:logic_0 
 logic_0 : rl_clk_cntl : input
Connects up to:clk_misc:clk_cntl:logic_0 
 logic_0 : rl_clk_stop : output
Connects down to:Mflipflop_s:start_ff:in 
Connects up to:misc:clk_stop:logic_0 
 logic_0 : rl_jtag_cntl : input
Connects down to:tap_decode:tapdcd:logic_0 , ir:inreg:logic_0 , bypass:byp:logic_0 , idreg:idr:logic_0 , ccr:clkc:logic_0 , tdo_control:tdoc:logic_0 
Connects up to:clk_misc:jtag_cntl:logic_0 
 logic_0 : rsflop : wire
 logic_0 : ssparc_chip : wire
Connects down to:clk_misc:clk_misc:logic_0 , ssparc_core:ssparc_core:logic_0 
 logic_0 : ssparc_core : input wire
Connects down to:mr_caches:caches:logic_0 
Connects up to:ssparc_chip:ssparc_core:logic_0 
 logic_0 : tap_decode : input
Connects up to:rl_jtag_cntl:tapdcd:logic_0 
 logic_0 : tdo_control : input
Connects up to:rl_jtag_cntl:tdoc:logic_0 
 logic_1 : bsr_control : input
Connects up to:rl_jtag_cntl:bsrc:logic_1 
 logic_1 : clk_misc : output
Connects down to:misc:ssparc_misc:logic_1 , rl_jtag_cntl:jtag_cntl:logic_1 
Connects up to:ssparc_chip:clk_misc:logic_1 
 logic_1 : idreg : input
Connects up to:rl_jtag_cntl:idr:logic_1 
 logic_1 : ir : input
Connects up to:rl_jtag_cntl:inreg:logic_1 
 logic_1 : Mflipflop : wire
 logic_1 : MflipflopR : wire
 logic_1 : misc : output
Connects down to:rl_clk_stop:clk_stop:logic_1 
Connects up to:clk_misc:ssparc_misc:logic_1 
 logic_1 : rl_clk_stop : output
Connects up to:misc:clk_stop:logic_1 
 logic_1 : rl_jtag_cntl : input
Connects down to:tap_decode:tapdcd:logic_1 , ir:inreg:logic_1 , bsr_control:bsrc:logic_1 , idreg:idr:logic_1 
Connects up to:clk_misc:jtag_cntl:logic_1 
 logic_1 : rsflop : wire
 logic_1 : ssparc_chip : wire
Connects down to:clk_misc:clk_misc:logic_1 
 logic_1 : ssparc_core : wire
 logic_1 : tap_decode : input
Connects up to:rl_jtag_cntl:tapdcd:logic_1 
 logic_one : mc_dtag : wire
 logic_one : mc_itag : wire
 log_chan : MEM_Device_Operating_Environment : integer
 log_reg_no : Mrf_xlate : input
Connects up to:Mdata_byp1_2:rd_xlate:d_rd , Mregfile:rs2_xlate:rs2_fetchm , Mregfile:rs1_xlate:rs1_fetchm , Mir:rs_st_xlate:d_rd , Mir:rd_xlate:w_rdm , Mdata_rf:rs1_xlate:d_rs1 , Mdata_rf:rs2_xlate:d_rs2 
 loop_count : sastasks : reg
 lotsa_ilock : Mpipec_help_ilock : wire
 LOW : final_adder : wire
Connects down to:ME_TIEOFF:t1:GND , add2_3:add2_3:a 
 LOW : fpm_round : wire
Connects down to:ME_TIEOFF:t1:GND 
 LOWFRQ : PLL300CBFI : input
 low_word_en : addr_reg : output wire
Connects up to:f_afx_slave:addr_reg:low_word_en 
 low_word_en : addr_tlb : input
Connects up to:f_afx_slave:addr_tlb:low_word_en 
 low_word_en : f_afx_slave : wire
Connects down to:addr_reg:addr_reg:low_word_en , addr_tlb:addr_tlb:low_word_en 
 low_word_only : promif : reg
 lo_addr : addr_reg : input
Connects up to:f_afx_slave:addr_reg:lo_addr 
 lo_addr : afx_mon : wire
 lo_addr : afx_slave : input wire
Connects up to:Msystem:Mafx:ssparc_core , Msystem:Mafx:ssparc , Msystem:Mafx:w_s_reply 
 lo_addr : f_afx_slave : input
Connects down to:addr_reg:addr_reg:lo_addr 
Connects up to:pcic:f_afx_slave:lo_addr 
 lo_addr : pcic : input
Connects down to:f_afx_slave:f_afx_slave:lo_addr 
Connects up to:ssparc_core:ssparc_pcic:w_s_reply 
 lo_addr_hold : addr_reg : reg
 lo_addr_reg : addr_reg : reg
 lq_delete_cmd_code : pcimaster_fm : integer
 lq_delete_cmd_code : pcislave_fm : integer
 lq_vfyn_f : pcimaster_fm : reg
 lq_vfyn_f : pcislave_fm : reg
 lrd : stat_ctl : wire
Connects down to:ME_FDS2LP2:rd_ff:D 
 lsb : final_adder : wire
Connects down to:add2_3:add2_3:s , fpm_round:round:lsb , man_n:man_n_0:a , man_v:man_v_0:a 
 lsb : fpm_round : input
Connects up to:final_adder:round:lsb 
 LSBCarryIn : MulLSBlog : input
Connects down to:ME_INVA:g27:a 
Connects up to:MultiplierLSB:lbg:CarryInLSBs 
 LSBCarryOut : MulLSBlog : output
Connects down to:StickyPairNCI:m3:Cout 
Connects up to:MultiplierLSB:lbg:CarryOut0 
 lstate : pcimaster_fm : integer
 lstate : pcislave_fm : integer
 lst_afx_cyc_type : rl_mcb_lgc : wire
Connects down to:Mflipflop_7:lst_cyc:out 
 ls_d : fhold_ctl : wire
Connects down to:ME_FDS2LP8:ls_ereg:D 
 ls_e : fhold_ctl : wire
Connects down to:ME_FDS2LP8:ls_ereg:Q , ME_FDS2LP8:ls_wreg:D 
 ls_e : fpc_ctl : wire
 ls_r : fhold_ctl : wire
Connects down to:ME_FDS2LP5:ls_rreg:Q 
 ls_r : fpc_ctl : wire
 ls_reg_ld : fhold_ctl : wire
Connects down to:ME_FDS2LP:ldreg_e_ff:ld , ME_FDS2LP:ldreg_w_ff:ld , ME_FDS2LP8:ls_ereg:LD , ME_FDS2LP8:ls_wreg:LD , ME_FDS2LP5:ls_rreg:LD 
 ls_w : fhold_ctl : wire
Connects down to:ME_FDS2LP8:ls_wreg:Q 
 ls_wuse : fhold_ctl : wire
Connects down to:ME_FDS2LP5:ls_rreg:D 
 ltafpc_t1 : Mpc_cntl : wire
Connects down to:Mflipflop_1:ltafpc_t1_reg_1:out 
 ltafpc_t2 : Mpc_cntl : wire
Connects down to:Mflipflop_1:ltafpc_t2_reg_1:out 
 lta_hold : Mdecode : output
Connects down to:Mpc_cntl:pc_cntl:lta_hold 
Connects up to:Miuchip:decode:lta_hold 
 lta_hold : Miuchip : wire
Connects down to:Mpc:pc:lta_hold , Mdecode:decode:lta_hold 
 lta_hold : Mpc : input
Connects up to:Miuchip:pc:lta_hold 
 lta_hold : Mpc_cntl : output wire
Connects up to:Mdecode:pc_cntl:lta_hold 
 lta_hold_real : Mpc : wire
Connects down to:Mflipflop_30:lta_reg_30:enable_l 
 lta_hold_real : Mpc_cntl : wire
Connects down to:Mflipflop_1:lta_low_reg_1:enable_l 
 lta_low : Mpc_cntl : wire
Connects down to:Mflipflop_1:lta_low_reg_1:out 
 ltem : stat_ctl : wire
Connects down to:ME_FDS2LP5:tem_ff:D 
 lvl : rl_ic_cntl : wire
Connects down to:MflipflopR_2:lvl_ff:out 
 lvl0 : CAM_LINE : wire
 lvl0 : IOCAM_LINE : wire
 lvl0_in : CAM_LINE : wire
 lvl0_in : IOCAM_LINE : wire
 lvl1 : CAM_LINE : wire
 lvl1 : IOCAM_LINE : wire
 lvl1_in : CAM_LINE : wire
 lvl1_in : IOCAM_LINE : wire
 lvl2 : CAM_LINE : wire
 lvl2 : IOCAM_LINE : wire
 lvl2_in : CAM_LINE : wire
 lvl2_in : IOCAM_LINE : wire
 lvl_out : dp_mmu : wire
 lvl_prb_data : dp_mmu : wire
 lvl_probe_hld : dp_mmu : input
Connects down to:MflipflopR_32:misc_in_reg_32:enable_l 
Connects up to:mmu:MMU_dp:lvl_probe_hld 
 lvl_probe_hld : mmu : wire
Connects down to:m_mmu_cntl:MMU_cntl:lvl_probe_hld , dp_mmu:MMU_dp:lvl_probe_hld 
 lvl_probe_hld : m_mmu_cntl : output
Connects down to:rl_tw_sm:tw_sm:lvl_probe_hld 
Connects up to:mmu:MMU_cntl:lvl_probe_hld 
 lvl_probe_hld : rl_tw_sm : output wire
Connects down to:MflipflopR_1:lvl_probe_hld_ff_1:out 
Connects up to:m_mmu_cntl:tw_sm:lvl_probe_hld 
 lvl_probe_hld_in : rl_tw_sm : wire
Connects down to:MflipflopR_1:lvl_probe_hld_ff_1:din 
 l_cycle : pcimaster_fm : reg
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