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Xilinx Answer #2634 : OBSOLETE!!!:3000 family: Bare die, what should the backside (substrate) be connected to?
Xilinx Answer #1829 : Bitstream compatability of the 3000, 3000A, 3000L, 3100 and 3100A devices.
Xilinx Answer #810 : XC3000: How to specify FGM mode in a schematic design using a CLBMAP
Xilinx Answer #489 : 94 DATA BOOK: page 2-148, 3090TQ176 pinout error: VSS (pin 133) is VCC
Xilinx Answer #242 : XC3000 JTAG - How to use Boundary Scan in a XC3000 device?
Xilinx Answer #209 : 94 DATA BOOK: TCLKIN missing from 3030VQ64 pinout