Return to the XCell Page
  homesearchagentssupportask xilinxmap

The Quarterly Journal for 
Xilinx Programmable Logic Users
Xcell 33 - Third Quarter, 1999 



Cover Story
Xilinx in the News
Applications
Success Stories
New Technology & Products
Perspective
Column

Get Acrobat to view the pdf PDF files below.  You can also download the entire xcell33.pdf fileInternet Link (2.7MB) from our File Download site. 

If you would like a subscription to the Xcell journal, use the literature request form.  If you have comments, suggestions, or would like your design featured in Xcell, e-mail editor@xilinx.com

In this Q3 '99 issue... 

  From the Editor:  Xilinx Online - Putting Things in Perspective 105KB

Cover Story

 Xilinx Online - A Revolution in Logic Design 47KB

Xilinx in the News

 Xilinx Receives Three IRL Industry Awards 26KB
 Xilinx Acquires CoolRunner Line of CPLDs 47KB
 Xilinx Design Series Text Books 32KB

Applications

 How to Add Features and Fix Bugs - Remotely 19KB
 Low-cost Spartan FPGAs Used in ADSL Modems 97KB
 Unusual Clock Dividers 53KB
 New EDIF Netlist Controls 52KB

Success Stories

 Who's Using Virtex and Spartan FPGAs in Xilinx Online Applications? 98KB
 Voice Technologies Group Creates Adaptable Network Interface 30KB
 The Evans & Sutherland Ensemble Image Generator 59KB

New Technology & Products

 New 2.1i Software - Shortens Design Cycles, Improves Productivity 205KB
 WebFITTER - Now Better Than Ever 52KB
 New WebPACK - Packs a CPLD Punch 90KB
 Get a Head Start with a New Virtex Development Board 45KB
 Advanced Chip Scale & BGA Packaging 95KB
 32-Channel (Duplex) ADPCM Transcoder for Virtex FPGAs 19KB
 FlibGen, FlibTime, and ChipView - Power Tools for FPGA Design 83KB
 New FPGA Compiler II - For Million-Gate Designs 135KB
 FPGA-on-Board Timing Verification Using Tau 133KB
 Web-integrated Software Manuals 86KB

Perspective

 Industry Leaders Discuss the Role of the Internet and Programmable Logic 64KB
 The Virtex Family - a Powerful ASIC Alternative 59KB

Column

 The Long-term Industry Outlook 64KB
 Verilog GSR/GTS Simulation Methodology - Changes in the Alliance Series 2.1i Software 29KB
 Questions & Answers - From the Xilinx Applications Engineering Staff 115KB