Introducing:

• The first 0.25 micron FPGA! 
• The first 500,000 gate FPGA Family! 
• The first 2.5V FPGA! 

500,000 System Gates 

The XC4000XV family, with up to 500,000 system gates, offers twice the capacity of competitive products.  Plus, you can maintain a high level of performance; efficient clock buffering and abundant, fast, segmented routing gives you the shortest possible interconnect delays  High Capacity:  30,000 to 500,000 system gates Over 18,000 dedicated flip-flops Over 270,000 RAM bits Up to 448 user I/O

• Patented SelectRAM^TM memory, fully synchronous timing, true dual-port capability 
• IEEE 1149.1-compatible boundary scan logic 
• Internal 3-state bus capability 
• 12/24 mA sink current per output 
• Wide edge decoders 

Supply Voltage 

Less than Half the Power Consumption 

Low Power Consumption:  0.35/0.25 micron 5LM process Efficient design optimized for minimal power consumption Reduced core operating voltage saves power

Relative Power Consumption

0.25 Micron Process Technology

The XV family is also the first to incorporate a 0.25 micron CMOS process with dual-gate oxide and five metal layers. UMC and Xilinx have jointly developed 0.25 micron FPGA technology. Xilinx's partnerships with industry leading manufacturing partners has directly aided in the delivery of advanced processes, and builds on a five year road map that will culminate in the availability of 2,000,000 gate FPGAs in the year 2000. 
 

Availability

Architectural Advantages and Family Highlights The XC4000XV family is an advanced implementation of the XC4000XL architecture with Xilinx segmented routing and distributed RAM. These features make an ideal platform for implementing cores. Local routing resources in short, segmented routing allow for predictable performance regardless of how much logic is employed and how large the device is. With non-segmented interconnect architectures, cores will slow down unpredictably as surrounding logic is added or as larger devices are required. Performance predictability is a requirement for designs with intellectual property because designers choose cores independently of device density and expect performance to remain the same as the design evolves. Further, due to footprint-compatibility advantages, current XC4000XL customers can easily and immediately upgrade to the higher-density XC4000XV products.    XC4000X Series Delivers Unprecedented Performance at High Capacities  The XC4000X series uses unique architectural enhancements and advanced 0.25 micron process technology to attain unprecedented speed at high capacities.  Additional routing resources and highly buffered clock networks ensure that you get the highest possible performance.  New tri-state I/O registers and FastCLK buffers significantly increase system performance.      I/O Features:  Tri-state I/O registers: -  high speed enable/disable  FastCLK I/O buffers: -  very fast CLK-to-out, setup and hold  3.3V and 5V PCI-compliant 12mA or 24mA output drive VersaRingTM I/O interface for pin-locking capability Over 200 MHz Chip-Chip Speeds      Architectural Features:  SelectRAM memory -  fully synchronous single-port or     dual-port RAM  Segmented routing resources deliver high performance at high capacities More clock buffering -  similar performance, from 30,000     to 500,000 gates Over 300 MHz Internal Speeds      New Software Delivers Very Fast Compile Times  Our new Alliance SeriesTM and Foundation SeriesTM version 1.5 software delivers increased performance in less than half the time.  Offered in both Alliance and Foundation platforms, version 1.5 introduces these powerful new tools.      A.K.A.speedTM Technology    Graphical Constraints Editor Voltage and Temperature Pro-rating Minimum Timing Delays Graphical Floorplanner Alliance and Foundation Series  Powerful timing-driven placement and routing Static time verification Dramatic productivity gains using the CORE Generator system for automatic logic generation Highest performance with industry-leading synthesis vendors Industry standard interfaces:  VHDL, Verilog, EDIF, SDF      to view the  PDF files below.  More Information        Product Information   XC4000XL/XLA   Virtex   Spartan IBIS I/O Models  Data Sheets  Application Notes  Hard Copy Literature Request Press Releases            First Million-Gate Virtex FPGA Delivered by UMC Group -  Xilinx Team  Xilinx set to Penetrate New Markets with Biggest Product Launch in History of PLD Industry  Xilinx Announces XC4000XL-08 FPGA