Xilinx Foundation: Top Solutions
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Solution 5765 - Foundation F2.1i: Users who install only "CPLD Implementation and Devices" without also installing "FPGA Implementation" will be missing several on-line help files, including the "What's New" help file.
Solution 6987 - Foundation F2.1i: Virtex Unified library macros/primitives not supported in HDL design flow.
Solution 6995 - Foundation F2.1i: Timing Simultion netlist is always created on subsequent runs.
Solution 6660 - Foundation F2.1i: "The server threw an exception"
Solution 6989 - Foundation F2.1i: Disable guide or floorplan does not work when selecting the option to copy using custom file.
Solution 6990 - Foundation F2.1i: Custom guide file setting is reset for each new revision.
Solution 7005 - Foundation F2.1i: Checkpoint Gate Simulation Control issues error when selecting NGD file.
Solution 6966 - Foundation F2.1i: Timing Simulation of Virtex CLKDLL(CLKDV_DIVIDE)
Solution 7042 - Foundation F2.1i: For schematic designs, the device list is missing certain speed grades: the 9536XV, 9572XV, and 95144XV are missing -4 and -5 speed grades. The 95288XV is missing -5 and -6 speed grades.
Solution 7043 - Foundation F2.1i: For schematic designs, the device list contains certain speed grades that are not available: the 9536XV contains a -3 speed grade.
