The Configuration Problem Solver

The RESET or INIT Pins are held Low.

    If the INIT pin never transitioned High to begin configuration then it may be because either the RESET pin or the INIT itself is being held Low externally. If either of these pins are held Low externally, the FPGA will be held in a wait state and the configuration process cannot begin. A 4.7Kohm pullup resistor on the INIT pin is recommended.

HISTORY
Family: XC3000
Mode: Master Parallel
D/P: LOW
INIT: LOW
ADD: NO