Subject: Communications from SV Basic Committee
From: Yatin Trivedi (trivedi@pacbell.net)
Date: Mon Sep 23 2002 - 09:57:54 PDT
Karen Pieper wrote:
>
> FYI. Handing the type stuff to you seems like an easy way to have just
> taken it off the table....
>
> Sigh.....
>
> K
>
> >From: Vassilios.Gerousis@infineon.com
> >To: Karen.Pieper@synopsys.COM
> >Subject: RE: Basic Committee
> >Date: Wed, 18 Sep 2002 23:40:34 +0200
> >X-Mailer: Internet Mail Service (5.5.2653.19)
> >
> >Hi Karen,
> > This should be a directive, that existing capabilities should not be
> >removed. There are fundamental "basic" capabilities such as interface that
> >allow designers to express ESD in an expressive way that distinguish it from
> >existing Verilog. Data types is also another area, where designers can use
> >direct data types that are part of a language than creating user-defined
> >one.
> > The focus should be more on disconnects, clarification and possible
> >holes. Just removing 3.0 items or changing their names is not an acceptable
> >practice.
> >
> >Best Regards
> >
> >Vassilios
> >-----Original Message-----
> >From: Karen Pieper [mailto:Karen.Pieper@synopsys.com]
> >Sent: Wednesday, September 18, 2002 7:48 PM
> >To: Gerousis Vassilios (CL DAT CS)
> >Subject: Basic Committee
> >
> >
> >Vassilios,
> >
> > With some of the issues with the SystemVerilog standard that have
> >been
> >raised, a reasonable
> >solution to make the issue go away is to remove some features (char type,
> >int type, shortint type, etc.)
> >Yesterday you expressed an opinion that the keyword "interface" could not
> >go away. Is there a
> >directive that none of the existing functionality can go away? Should we
> >just be polishing what is
> >there with no move to depricate or remove anything?
> >
> >Thanks,
> >
> >Karen
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