Subject: Re: Comments on DirectC
From: Swapnajit Mittra (mittra@juno.com)
Date: Sat Oct 05 2002 - 16:39:19 PDT
I am sending this as Joao's original reply never
made it through the email reflector. (Joao, thanks
again for the clarification).
- Swapnajit.
================================================
Swapnajit,
you are correct, DirectC includes no functionality for invoking Verilog
tasks
from within the C code, though it does posses mechanisms to wait on
Verilog
signals and to wait for a specific amount of time to pass.
As many people seem interested in this other direction (C invoking
Verilog), it
seems reasonable that this be added to the DFLI requirements. Once it is
in
the requirements, we, as a committee, can work on extending the donations
to support this capability.
As to callback mechanisms, directC module does provide similar
functionality,
by writing
always {
@(signal);
/* do stuff */
}
inside a directC cmodule code. Alternatively, the same can be
accomplished using
directC functions, by writing in the Verilog:
always @(signal) begin
cfunction(arguments);
end
Note that DirectC is not intended to be a replacement for VPI/PLI.
Instead it
is a "point" API tuned to a specific tasks, namely the integration
of C functions/models in a clean and efficient way into Verilog without
needing
significant changes on either the Verilog or C code and without the
authors
of the C code requiring any extensive knowledge of Verilog or Verilog
APIs.
Joao
=========================================================================
=====
Joao Geada, PhD Sr. Staff R&D Engineer Verif Tech
Group
Synopsys, Inc TEL: (508)
263-8083
154 Crane Meadow Road, Suite 300, FAX: (508)
263-8069
Marlboro, MA 01752, USA
=========================================================================
=====
>
> Hello all,
>
> Thanks Joao for a great presentations today.
> I have couple of comments on DirectC that I hope
> would not be inappropriate to raise here. Since
> this was my first participation, these issues may have been
> discussed in earlier meetings already. Also, all my
> comments are based on what I have seen in VCS doc.
> for DirectC - I am assuming the main framework will
> remain the same for SV too.
>
> o It appears to me (and somebody pointed this out during
> the meeting too) that in DirectC there is no straightforward
> way of calling a Verilog task from C function. I mention this
> because I run a Verilog PLI related website and I get the
> question on how to call a Verilog task from C function
> (reverse direction of PLI) regularly. I believe CBlend of
> Superlog provides this already. I think we should consider
> providing this feature in SV-CC too.
>
> o Does DirectC provide a callback mechanism (a la
> reason, data etc.) ? According to the DirectC manual
> that I have, it does not. Probably we should consider
> providing that too if DirectC is accepted as part of SV.
> There are two reasons for this:
> - The first reason is practical - as an end user, if I write
> an external application in C, I think I would rather prefer
> to use only one of acc_*, vpi_* or DirectC, but probably
> not a mixture of both of them - acc_ for callback and
> DirectC for fast execution.
> - The second reason is more pedantic - if DirectC is
> provided as an independent API, it should contain all the
> features of a standard API (like PLI).
>
> Comments ?
> --
> Swapnajit Mittra
-- Swapnajit Mittra Vineyard Research Inc. http://www.angelfire.com/ca/verilog________________________________________________________________ GET INTERNET ACCESS FROM JUNO! Juno offers FREE or PREMIUM Internet access for less! Join Juno today! For your FREE software, visit: http://dl.www.juno.com/get/web/.
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