Subject: ISSUE 1.7:DirectC:Abstract Access Method requires rewrite of code
From: Andrzej Litwiniuk (Andrzej.Litwiniuk@synopsys.com)
Date: Thu Nov 21 2002 - 14:24:27 PST
Team,
I believe that the abstract access mode is useful for debugging
and should be used in the first cut of any SV + C system.
IMO the following methodology could be advised for writing, testing and
debugging heterogenous systems built up from SV and C components:
- initially only abstract access mode is used (except standard library functions).
This will allow to catch all interface related bugs, such as discrepancies
between the types of formal and actual arguments, wrong port directions,
wrong declarations on the C side, etc.
- once the correctness of the interface is verified, the access mode
may be switched to direct access, to improve simulation performance.
Michael Rohleder had valid and understandable concerns (ISSUE 1.7):
"From a user perspective it is NOT acceptable that I have to rewrite a DirectC
function after I have debugged it. This is a manual, error prone process I will
want to avoid under any circumstance. It is also a problem, since after changing
the already debugged version, I might just introduce some more problems. There
must be some way to automate this work, something I would regard as a critical
and important feature."
Well, I believe that this problem can be easy avoided with a little programming
discipline. Really, there is no need to modify source C code when switching
between abstract and direct access mode. The access mode matters only
in getting the values of inputs/inouts and putting values to outputs/inouts.
And such tiny fragments of code may be easily isolated. Access mode is irrelevant
for the algorithm's proper!
Let me illustrate this with - perhaps a bit simplistic - VCS DirectC example.
The following two versions of VCS command line will deploy compilation with,
respectively, direct or abstract access mode, for the same source code:
vcs design.v aux_C_code.c +vc
vcs design.v aux_C_code.c +vc+abstract -CFLAGS "-D ABSTRACT"
In the above command lines:
'design.v' contains Verilog code, 'aux_C_code.c' contains C code.
+vc enables DirectC.
+vc+abstract enables DirectC and specifies abstract access for all functions
(unless extern "C" was specified for a particluar function)
-CFLAGS "-D ABSTRACT" defines flags ("-D ABSTRACT") to be passed to
the C compiler.
The trick is to use C conditional compilation.
============ design.v ================
extern void cfunc(input int i; output int o);
...
// Verilog stuff
...
============ aux_C_code.c ============
#ifndef ABSTRACT /* i.e. DIRECT access mode */
/* input passed by value, output passed by reference */
extern void cfunc(/*input*/ int i; /*output*/ int *o)
#define GET_INT_VALUE(arg) (arg)
#define PUT_INT_VALUE(arg,value) {*arg=value;}
#else /* ABSTRACT access mode */
/* input and output passed by handle */
extern void cfunc(/*input*/ vc_handle i; /*output*/ vc_handle o)
#define GET_INT_VALUE(arg) (vc_getInteger(arg))
#define PUT_INT_VALUE(arg,value) {vc_putInteger(arg,value);}
#endif /* DIRECT vs. ABSTRACT */
{
int n = GET_INT_VALUE(i); /* value of the input arg */
... /* function body not depending on the access mode */
PUT_INT_VALUE(o, ...); /* value to be assigned to the output arg */);
}
======================================
Of course, the same effect can be achieved in several ways;
what is key, however, is the separation of the algorithm's proper and the access
to the formal arguments. It doesn't seem to be a big deal.
Regards,
Andrzej
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