System Verilog Assertion API.pdf;System Verilog Assertion API.doc

Subject: System Verilog Assertion API.pdf;System Verilog Assertion API.doc
From: Joao Geada (Joao.Geada@synopsys.com)
Date: Mon Dec 02 2002 - 05:30:59 PST

• Next message: Kevin Cameron x3251: "Re: Poll on ISSUE 1.1"
• Previous message: Andrzej Litwiniuk: "Re: Poll on ISSUE 1.1"
• Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

Hi all,

please find attached a first draft proposal adapting the Synopsys Assertion API
donation to SystemVerilog.
Note that the API has been expanded to include suggestions made during
the initial review, including a "trace" API (which can also be used to obtain
"driver" type information for assertions).

Joao

• application/pdf attachment: System_Verilog_Assertion_API.pdf

• application/msword attachment: System_Verilog_Assertion_API.doc

• Next message: Kevin Cameron x3251: "Re: Poll on ISSUE 1.1"
• Previous message: Andrzej Litwiniuk: "Re: Poll on ISSUE 1.1"
• Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

This archive was generated by hypermail 2b28 : Mon Dec 02 2002 - 05:39:00 PST