Subject: vote on the direct C api
From: Francoise Martinolle (fm@cadence.com)
Date: Mon Jan 20 2003 - 08:44:47 PST
I would like to pull out the open arrays access outside of the direct C api
for voting. We can do the voting in 2 parts.
My principal argument is that SV has no open arrays today, so I don't
see why we have to define the directC for it. Why would we want to
open arrays to systemVerilog? In an open array, the actual ranges of the arrays are only determined at runtime by the Verilog simulator, correct?
This is the similar concept as to VHDL unconstrained arrays. If there is a need and request from Verilog users for it, there should be first a clear language definition for it. On the other hand, the extension committee is adding dynamic arrays and associative arrays, I don't think we have looked at the directC access for these and whether the access to open arrays we have defined would work for either dynamic or associative
arrays.
Francoise
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