[sv-cc] SV-CC agenda for 10/27/2004

Hi All,

The call-in information for this meeting is as follows:

   U.S. 866-807-0627
   International 203-955-5179
   Passcode 399143

Meeting will start at 11:30am EST (3:30pm GMT), and last for 1.5 hours.

   -Chas

AGENDA

1. Review Patent information

   Go to:
     http://standards.ieee.org/board/pat/pat-slideset.ppt

2. Review minutes from last meeting (10/20/2004)

3. Liaisons

   - Anyone care to make a report?

4. New business

   - Others?

5. Review SV-CC items with proposals:

   - Item 125: "typespec", not "type spec" in VPI variables object model
   - Item 066: Error in VPI assertion traversal examples
   - Item 067: Add vpiAssertionType to enumerations

6. Review SV-CC items with proposals (Straw poll only):

   - Item 069: vpi_get() use vpiAssertionType instead of vpiAssertionDirective
   - Item 070: Replace vpiAssertionDirective reference in the index by vpiAssertionType
   - Item 264: sv_vpi_user.h needs to add vpiAssertionType property
   - Item 265: sv_vpi_user.h has redundancy
   - Item 266: sv_vpi_user.h has an unused vpiSequenceSpec
   - Item 044: var bit vs. vpiVarBitVar in VPI
   - Item 121: Erroneously numbered Note "5" in VPI Typespec object model
   - Item 122: Eliminate property vpiTypedefType as redundant
   - Item 123: Clarify meaning of "member typespec" in VPI
   - Item 205: Binary compatibility for packed arrays as fields and as elements of unpacked arrays

7. Review old business:

   SV-CC action items:
   - Chas to assign remaining Items to those without open ones now.
   - Chas to get the database updated to reflect the previous meetings.
   - Francoise to ask Peter Ashenden what was done to improve
     printing from Rational Rose.
   - Francoise to inquire about the feasibility of third parties
     shipping the UML for the diagrams.
   - JimV to resubmit a proposal for Item 123.
   - Joao/Francoise to file SV-BC item asking to define linearization.
   - Francoise to check with SV-BC on default return type of functions.
   - Chas to ask Karen about updating the diagrams (does not fit well
     with approved process).
   - Andrzej to make sure the LRM says that for the C layer of DPI,
     representations of a type are always the same regardless of where
     it is (packed struct, member of array, ...etc.).

   PTF action items:
   - Steve to compare BNF with the access available
     for attributes to see if they match
   - Francoise to remove "+" from tags in UML diagrams and
     add vpi prefix where appropriate.
   - Francoise to send out HTML for 1364-2001 diagrams, using
     something other than JPG for importing diagrams into frame.
   - Stu to write proposal for PTF 368.
   - Francoise to write proposals for PTF 373, 374, and 396.
   - Steve to write proposals for PTF 311, and 495.
   - Sachi to write proposals for PTF 307, 312, and 313.
   - All to review Generates proposal from ETF committee.
   - Francoise, et all to review BTF generates proposal
     for the upcoming vote, with particular emphasis on
     how we will address generates in VPI.
   - Stu to enter new PTF item for save/restart/reset issue.
   - JimG to write proposals for PTF 517, 533, and 534.
   - Chas to write proposal for PTF 296.
   - Stu to write an addition to the proposal for PTF 342.
     This will cover that PLI 1.0 was deprecated in section 20
     and include some of the stuff currently in section 21
     (like the descriptions for the checktf and calltf).
   - Francoise to lookup wording for PTF 524 in VHPI.
   - JimV to try to rework proposal for PTF 530 to address other
     issues we found in 26.6.17.
   - Francoise will open a new PTF issue to look for situations like 25.6.15,
     where multiple methods are used access the same object enclosure
   - Chas to reword proposal for PTF 525.
   - Draft a straw man proposal using a clean slate with no concern for
     existing PLI/VPI on the best way to represent all Verilog and
     SystemVerilog kinds and types. This straw man will then be used as a
     basis for discussing backward compatibility with the existing reg, net,
     variables, functions, and parameter diagrams. It may be decided that
     full backward compatibility is not possible, or is not the best approach
     moving forward.
   - Sachi will file a PTF item for the clarification of what can be done
     at ROsync time and putting values in future times.
   - Francoise to file a PTF item that asks to specify the order that iteration
     occur in, when the order is important.
   - Steve to add ETF item for Annex C to remove the Informative label, but
     still allow the contents to be optional.

-- 
Charles Dawson
Senior Engineering Manager
NC-Verilog Team
Cadence Design Systems, Inc.
270 Billerica Road
Chelmsford, MA  01824
(978) 262 - 6273
chas@cadence.com