[sv-cc] [Fwd: [P1800] P1364-2005 Draft 4 available]

-------- Original Message --------
Subject: [P1800] P1364-2005 Draft 4 available
Date: Wed, 8 Dec 2004 10:51:40 -0800
From: "Fitzpatrick, Tom" <tom_fitzpatrick@mentorg.com>
To: <1364@accellera.org>, <btf@boyd.com>, <etf@boyd.com>,
<ptf@boyd.com>, <sv-ec@eda.org>, <sv-bc@eda.org>, <sv-ac@eda.org>,
<sv-cc@eda.org>, <ieee1800@eda.org>

Hi Everyone,

It is my pleasure, as the newly elected chair of the P1364 Working
Group, to announce that Draft 4 of the P1364-2005 standard is now
available for your perusal. You may find it at

http://www.eda.org/sv-ieee1800/Specifications/1364-2005_Draft4_2004-12-01.pdf

I'd like to express my appreciation to everyone who contributed to this
draft, especially the editors. Please take some time to go through it
and respond with any comments to me by Thursday, 12/23/04. This will
give us time to incorporate any feedback into the next draft.

I'm also tentatively calling for a 1364 WG meeting the week of 1/3/05 to
address any comments that come out of the review. If there aren't any
comments, I'll cancel the meeting. Should we stick with the regular
Monday time, or will folks still be recovering from New Year's?

Thanks,
-Tom

Tom Fitzpatrick
Verification Technologist
Mentor Graphics Corporation
tfitz@model.com <mailto:tfitz@model.com>
W: (978)448-8797
C: (978)337-7641

-- 
Charles Dawson
Senior Engineering Manager
NC-Verilog Team
Cadence Design Systems, Inc.
270 Billerica Road
Chelmsford, MA  01824
(978) 262 - 6273
chas@cadence.com