[sv-cc] Text error in Annex E.

In the latest drafts in Annex E, I see that SystemVerilog is mentioned
as 2 separate words. This is a trivial issue, but may be you would like
to change that.

Page: 559 Paragraph: 2.

"Normalized ranges are used for the canonical representation of packed
arrays in C and for System Verilog arrays passed as actual arguments..."

Another instance in the same paragraph, last line:

"...indices as defined in System Verilog for the ...."

-- 
Krishna
408-215-6152