[sv-cc] ref obj: more clarifications and issues

I uploaded an update for the ref obj diagram, however I still think that
there are some 
clarifications or issues with the access to ref obj.
The access depicted by this diagram seems to only support ref obj which
represent the entire net/variable.
However we could have an expression which is a bit select of a net, a member
select of a variable and the variable
or net are passed by reference.
 
Consider the following example:
ex:
typedef struct { logic [1:0] m1; real m2 [2:0];} struct_t;
 
module m (ref struct_t v);
 
 initial begin
     v.m1 = 2'b0;      ??
     v.m1[1:0] = 2'b0;    ??
     v.m1[0] = 1'b0;       ??
     v.m2 = '{0.0. 1.0, 2.0};    ??
     v.m2[2] = 3.0;     ??
 end
endmodule
 
v is a ref obj but what is v.m1? 
If v was not passed by reference, v.m1 would be a logic var.
But because v is passed by reference and v is a ref obj, does it make it a
ref obj?
 
Same question for v.m2. v.m2 would be an array var if v was not passed by
reference.
 
If v.m2 is a ref obj, what is its name and vpiActual returns?
 
I am also wondering what does the vpiParent relationship does? Is it used
for the purpose of walking from
a sub ref obj to its parent ref obj (for instance from a var select ref obj
to the array 
var ref obj like in the case of v.m2[2]?)
 
If we model all these uses as ref obj, I think that we are missing a few
relationships and properties to 
be able to distinguish between the expressions in the example. 
If we don't, is it okay to go from var select handle representing v.m2[2] to
a parent ref obj representing v?
 
Perhaps we can discuss these issues on Monday.
 
 
Francoise
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