RE: [sv-cc] [Fwd: [sv-bc] Open array mixed with normal array]

An example with mixed indices (although not mixed within
the set of unpacked ranges) is

  import "DPI" function void boo(logic [127:0] i []);

which occurs in "26.4.6.1 Open arrays" in IEEE Std 1800-2005,
as well as in "F.11.10 Example 8-Access to packed arrays".

Note:  "DPI" should be changed to "DPI-C" in these examples,
if I'm not mistaken.

I have a question, though, now that I've read the paragraph.
Do we ever define what it means for the actual and formal
arguments to "match"?  Does that mean that they have the
same number of dimensions, and that the actual and formal
have the same number of elements in any dimension that
is not open?  Or for dimensions that are not open, do
the actual bounds have to match?

And then there's that paragraph in 26.4.6.1 that says

"Although the packed part of an array can have an
arbitrary number of dimensions, in the case of open arrays
only a single dimension is allowed for the packed part.
This is not very restrictive, however, because any
packed type is eventually equivalent to a one-dimensional
packed array."

What does this say about whether or not the number of
packed dimensions must match between the formal and
the actual?

Thanks,
Jim Vellenga


--------------------------------------------------------- 
James H. Vellenga                            978-262-6381 
Engineering Director                   (FAX) 978-262-6636 
Cadence Design Systems, Inc.         vellenga@cadence.com 
270 Billerica Rd 
Chelmsford, MA 01824-4179 
"We all work with partial information." 
---------------------------------------------------------- 
  
 

] -----Original Message-----
] From: owner-sv-cc@eda.org [mailto:owner-sv-cc@eda.org] On 
] Behalf Of Andrzej I. Litwiniuk
] Sent: Wednesday, January 18, 2006 9:44 AM
] To: Francoise Martinolle
] Cc: 'SV-CC'
] Subject: RE: [sv-cc] [Fwd: [sv-bc] Open array mixed with normal array]
] 
] 
] 
] On Wed, 18 Jan 2006, francoise martinolle wrote:
] > Note: Andrzej  second example is missing the declaration of 
] b1 and b2 in
] > module top.
] 
] No declaration is missing. It is an unfortunate formatting (e-mail
] editor?) that made it almost illegible. b1 is declared in the 
] same line as
] foo, and b2 in the same line as initial block. It isn't the way I
] intended.
] 
] Andrzej
] 
] 
] > -----Original Message-----
] > From: owner-sv-cc@eda.org [mailto:owner-sv-cc@eda.org] On 
] Behalf Of Charles
] > Dawson
] > Sent: Wednesday, January 18, 2006 12:28 AM
] > To: SV-CC
] > Subject: [sv-cc] [Fwd: FW: FW: [sv-bc] Open array mixed 
] with normal array]
] >
] > Hi All,
] >
] > Would anyone like to comment on this response?
] >
] >    -Chas
] >
] > -------- Original Message --------
] > Subject: FW: FW: [sv-bc] Open array mixed with normal array
] > Date: Wed, 4 Jan 2006 15:09:41 -0800
] > From: "Ghassan Khoory" <Ghassan.Khoory@synopsys.com>
] > To: "Charlie Dawson" <chas>
] >
] >
] > Hi Chas:
] >
] > This is a response to the question that was raised through Brad.
] > Please, review and check if you are in agreement before 
] sending to the user
] > that originally inquired.
] >
] > Thanks,
] > /gjk
] > -----Original Message-----
] > From: Andrzej Litwiniuk
] >
] > On Wed, 21 Dec 2005, Ghassan Khoory wrote:
] >  > Can you comment on this to Chas and myself based on SV LRM.
] >
] > The subject "Open array mixed with normal array" and the 
] question "whether
] > open array can be mixed up with normal array or not" need 
] clarification as
] > it is a possible misunderstanding. An open array is not a 
] new data type, it
] > is merely an incomplete declaration of a regular array with 
] missing sizes of
] > some of dimensions, or, in other words, a generic declaration.
] > Here is the excerpt from SV LRM (draft 4):
] >
] > 28.4.6.1 Open arrays
] >
] > "The size of the packed dimension, the unpacked dimension, or both
] >   dimensions can remain unspecified; such cases are 
] referred to as open
] >   arrays (or unsized arrays). [...] A formal argument is an 
] open array when
] >   a range of one or more of its dimensions is unspecified 
] (denoted by using
] >   square brackets ( [] )). This is solely a relaxation of the
] >   argument-matching rules. An actual argument shall match 
] the formal one
] >   regardless of the range(s) for its corresponding dimension(s)"
] >
] > The key part is "a range of one or more of its dimensions 
] is unspecified".
] > Therefore both examples seem correct.
] >
] > Unfortunately the same notation, '[]', is used also for 
] dynamic arrays, what
] > may make an impression that '[]' inside a declaration of 
] DPI function
] > denotes another type of array, or even worse, that a formal 
] argument is a
] > dynamic array.
] >
] > The following examples may illustrate this (based on the 
] original ones):
] >
] > module top;
] > typedef bit array_int[1:0][2:0];
] >
] > import "DPI" function void foo(array_int yi[][]);
] >
] > array_int b1[3][5];
] > array_int b2[4][2];
] > initial begin
] > 	foo(b1);
] > 	foo(b2);
] > 	end
] > endmodule
] >
] >
] > module top;
] >
] > import "DPI" function void foo(input logic yi[1:0][]); 
] logic b1[1:0][5];
] > logic b2[3:2][7]; initial begin
] > 	foo(b1);
] > 	foo(b2);
] > 	end
] > endmodule
] >
] >
] > Regards,
] > Andrzej
] >
] >
] >
] >
] >  > -----Original Message-----
] >  > From: Brad Pierce
] >  > Sent: Wednesday, December 21, 2005 11:41 AM  > To: 
] Ghassan Khoory;
] > chas@cadence.com  > Subject: FW: [sv-bc] Open array mixed 
] with normal array
] > >  >  >  > -----Original Message-----  > From: owner-sv-bc@eda.org
] > [mailto:owner-sv-bc@eda.org] On Behalf Of  > Surya Pratik 
] Saha  > Sent:
] > Wednesday, December 21, 2005 3:30 AM  > To: sv-bc@eda.org  
] > Cc: Trainee19
] > (Moumita Das)  > Subject: [sv-bc] Open array mixed with 
] normal array  >  >
] > SV supports open array for DPI construct. It is not clear 
] whether open  >
] > array  > can be mixed up with normal array or not. Please 
] can you someone
] > clarify  > whether  > the following two examples are correct or not.
] >  >
] >  > e.g. 1
] >  > module top;
] >  > typedef bit  array_int[1:0][2:0];
] >  >
] >  > import "DPI" function  int XYZ_1(array_int yi[][], 
] bit[5:0] b);  >  >
] > endmodule  >  > e.g. 2  > module top;  >  > import "DPI" 
] function  int
] > XYZ_1(input logic yi[1:0][]);  >  > endmodule  >  > Regards 
]  > Surya.
] >  >
] >  >
] >
] >
] >
] > --
] > Charles Dawson
] > Senior Engineering Manager
] > NC-Verilog Team
] > Cadence Design Systems, Inc.
] > 270 Billerica Road
] > Chelmsford, MA  01824
] > (978) 262 - 6273
] > chas@cadence.com
] >
] >
] >
] >
] 
]