[sv-cc] FW: a question about system verilog class deconstructor

Can anyone respond to this question?

Thanks,

Stu
~~~~~~~~~~~~~~~~~~~~~~~~~
Stuart Sutherland
Sutherland HDL, Inc.
stuart@sutherland-hdl.com
503-692-0898

-----Original Message-----
From: Feng Xian [mailto:alex.xian@gmail.com] 
Sent: Wednesday, January 10, 2007 6:42 AM
To: info@sutherland-hdl.com; stuart@sutherland-hdl.com
Cc: Feng Xian
Subject: a question about system verilog class deconstructor
Importance: High

Dear Mr Stuart,

I have a question about the System Verilog's class memory management. The
class in system verilog only provide a constructor 'new' but not a
deconstructor 'delete'. The LRM declares that 'SystemVerilog manages all
dynamic memory automatically.' in section 11.26. But this is not the case
when DPI is involved. A System Verilog class that uses DPI potentially has
other resources allocated in the C functions, e.g. memory allocation (new a
C++ object) or a TCP socket etc. When an instance of this system verilog
class is reclaimed by System Verilog's garbage collection mechanism, there's
no automatic way provided to let the class have an opportunity to  call DPI
to deallocate the resource  that DPI allocated previously. For example, 

import "DPI" function chandle newCPlusPlusObj();
import "DPI" function int CPlusPlusObjMethod(chandle obj);

class SvClass;
    local chandle cppObj;
    int retVal;

    function new(); 
              cppObj = newCPlusPlusObj();    // this DPI call will allocate
a c++ object by using 'new' in c++ code wrapper
    endfunction : new

    function doSth()
             retVal = CPlusPlusObjMethod(cppObj); // this method may
allocate more resources that SV is not aware of ( e.g. TCP socket, etc.)
             ....
    endfunction : doSth

endclass : SvClass;

in caller
          // a scope that uses SVClass
          {
          SvClass svObj;
          svObj = new;     // create a new SvClass instance  which will call
DPI to 'new' a C++ object 
          ...
          }
          // scope closed, svObj is deallocated by System Verilog
automatically, but C++ object leaked


Is this a possible SystemVerilog design hole or you may have other way to
work around this? (Well, I am not talking about re-implement C++ object in
SV) 

Thanks in advance,

Alex

-- 
Alex Xian
---------------------------------------------------------
* The only thing constant in this world is Change
* Attitude, after all, is everything 



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